jtag
所属分类:Linux/Unix编程
开发工具:C/C++
文件大小:25KB
下载次数:44
上传日期:2009-12-14 09:45:51
上 传 者:
wgpsun
说明: linux下使用c语言编写的flash烧写程序。使用jtag边界扫描链控制flash,并将数据写入flash中。
(linux using c language program written in flash Shaoxie. Jtag boundary scan chain to control the use of flash, and the data is written to flash.)
文件列表:
jtag\driver.2_2\Makefile (541, 2002-03-03)
jtag\driver.2_2\modversions.h (129, 1999-12-27)
jtag\driver.2_2\short.c (4653, 2002-03-03)
jtag\driver.2_2\short.o (3848, 2002-03-03)
jtag\driver.2_2\short_load (903, 2001-03-04)
jtag\driver.2_2\short_unload (211, 1999-12-27)
jtag\driver.2_2\sysdep-2.1.h (6498, 1999-12-27)
jtag\jflash\jflash (22980, 2002-09-28)
jtag\jflash\jflash.c (9865, 2002-09-28)
jtag\jflash\jtagio.c (9096, 2002-09-28)
jtag\jflash\Makefile (298, 2002-09-28)
jtag\jflash\sa1110jtag.h (6789, 2002-03-07)
jtag\driver.2_2 (0, 2009-12-14)
jtag\jflash (0, 2009-12-14)
jtag (0, 2009-12-14)
1. What is this?
This is a brief description of how to use jflash under Linux.
For programming Jornada 56x and Badge4 devices.
2. How do I use it?
To access the parallel port, first load the enclosed driver:
su
cd driver.2_2
./short_load
lsmod -- you should see a module named 'short'
Now go into the directory jflash (as a normal user).
To read out the current contents of flash using the JTAG interface
and write to a file:
jflash R
To write a new file to flash:
jflash W
To read flash and verify that it matches the binary contents
of a file:
jflash V
3. Parallel port connector pins
This is the standard parallel port pin configuration used
on the SA-1110 Development Kit:
Cable has 100 ohm series resistors in all lines.
Output pins (LPT driving):
LPT D0 Pin 2 and TCK
LPT D1 Pin 3 and TDI
LPT D2 Pin 4 and TMS
Input pin (SA-1110 board drives):
LPT Busy Pin 11 and TDO
Output pin
LPT Pin 14 and nTRST
4. Jornada56x modifications
4.1. JTAG connector
The JTAG signals are accessible from the area of the PCB
visible after the cover over the CF slot is removed.
With the 560 face down and the IR port pointing away
from you, you will see 7 circular dots in a vertical
row in the upper right of the visible PCB area.
The signals on these pins are:
Edge of PCB
|-----------|
|1. Unknown |
|2. Ground |
|3. TCK |
|4. TMS |
|5. nTRST |
|6. TDO |
|7. TDI |
|-----------|
Side towards battery
4.2 Vpp flash write enable
When GPIO26 of the SA-1110 is 1, flash can be written.
When 0, writing to flash is disabled (hopefully).
5. Ipaq H3800 modifications
Defining CONFIG_SA1100_H3800 when compiling will
produce a version that works for the H3800.
6. Credits
This program is a very minor edit of the jflash utility available
from intel at:
http://www.intel.com/design/strong/swsup/downloads/SA1110JFlashKit_V12.htm
who is the original author of the code (although no copyright statements!).
John Ankcorn
HP Laboratories
Palo Alto, CA
jca
9/25/2002
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