FPGA_AD

所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:241KB
下载次数:833
上传日期:2009-12-27 00:32:57
上 传 者icemoon1987
说明:  基于 Cyclone EP1C6240C8 FPGA的ADS2807接口程序,主要用来使用FPGA控制ADS2807的采集。 采用FPGA来模拟ADS2807的时序来实现控制功能。 提供采样频率控制、AD通道转换、采样数据缓存等功能。
(Cyclone EP1C6240C8 FPGA-based interface program of the ADS2807, ADS2807 is mainly used to control the use of FPGA collection. ADS2807 with FPGA to simulate the timing to achieve control functions. To provide sampling frequency control, AD-channel conversion, sampled-data caching and other functions.)

文件列表:
FPGA_AD\Block1.bdf (9737, 2009-08-07)
FPGA_AD\db\add_sub_3ph.tdf (4404, 2009-08-07)
FPGA_AD\db\add_sub_jsh.tdf (3721, 2009-08-07)
FPGA_AD\db\FPGA_AD.(0).cnf.cdb (13528, 2009-08-07)
FPGA_AD\db\FPGA_AD.(0).cnf.hdb (2752, 2009-08-07)
FPGA_AD\db\FPGA_AD.cbx.xml (279, 2009-08-07)
FPGA_AD\db\FPGA_AD.cmp.rdb (5524, 2009-08-07)
FPGA_AD\db\FPGA_AD.cmp_merge.kpt (344, 2009-08-07)
FPGA_AD\db\FPGA_AD.db_info (137, 2009-08-07)
FPGA_AD\db\FPGA_AD.eco.cdb (161, 2009-08-08)
FPGA_AD\db\FPGA_AD.eds_overflow (3, 2009-08-07)
FPGA_AD\db\FPGA_AD.fnsim.cdb (15493, 2009-08-07)
FPGA_AD\db\FPGA_AD.fnsim.hdb (22107, 2009-08-07)
FPGA_AD\db\FPGA_AD.fnsim.qmsg (13370, 2009-08-07)
FPGA_AD\db\FPGA_AD.hier_info (6841, 2009-08-07)
FPGA_AD\db\FPGA_AD.hif (1303, 2009-08-07)
FPGA_AD\db\FPGA_AD.lpc.html (430, 2009-08-07)
FPGA_AD\db\FPGA_AD.lpc.rdb (385, 2009-08-07)
FPGA_AD\db\FPGA_AD.lpc.txt (1060, 2009-08-07)
FPGA_AD\db\FPGA_AD.map.bpm (871, 2009-08-07)
FPGA_AD\db\FPGA_AD.map.cdb (7127, 2009-08-07)
FPGA_AD\db\FPGA_AD.map.ecobp (28, 2009-08-07)
FPGA_AD\db\FPGA_AD.map.hdb (9617, 2009-08-07)
FPGA_AD\db\FPGA_AD.map.kpt (56561, 2009-08-07)
FPGA_AD\db\FPGA_AD.map.logdb (4, 2009-08-07)
FPGA_AD\db\FPGA_AD.map.qmsg (2460, 2009-08-08)
FPGA_AD\db\FPGA_AD.map_bb.cdb (919, 2009-08-07)
FPGA_AD\db\FPGA_AD.map_bb.hdb (6836, 2009-08-07)
FPGA_AD\db\FPGA_AD.map_bb.logdb (4, 2009-08-07)
FPGA_AD\db\FPGA_AD.pre_map.cdb (13526, 2009-08-07)
FPGA_AD\db\FPGA_AD.pre_map.hdb (9458, 2009-08-07)
FPGA_AD\db\FPGA_AD.rpp.qmsg (1835, 2009-08-07)
FPGA_AD\db\FPGA_AD.rtlv.hdb (9423, 2009-08-07)
FPGA_AD\db\FPGA_AD.rtlv_sg.cdb (13436, 2009-08-07)
FPGA_AD\db\FPGA_AD.rtlv_sg_swap.cdb (178, 2009-08-07)
FPGA_AD\db\FPGA_AD.sgate.rvd (7142, 2009-08-07)
FPGA_AD\db\FPGA_AD.sgate_sm.rvd (2764, 2009-08-07)
FPGA_AD\db\FPGA_AD.sgdiff.cdb (8117, 2009-08-07)
FPGA_AD\db\FPGA_AD.sgdiff.hdb (10034, 2009-08-07)
FPGA_AD\db\FPGA_AD.sim.cvwf (2676, 2009-08-07)
... ...

This folder contains data for incremental compilation. The compiled_partitions sub-folder contains previous compilation results for each partition. As long as this folder is preserved, incremental compilation results from earlier compiles can be re-used. To perform a clean compilation from source files for all partitions, both the db and incremental_db folder should be removed. The imported_partitions sub-folder contains the last imported QXP for each imported partition. As long as this folder is preserved, imported partitions will be automatically re-imported when the db or incremental_db/compiled_partitions folders are removed.

近期下载者

相关文件


收藏者