5956447divider
所属分类：处理器开发
开发工具：Others
文件大小：3KB
下载次数：25
上传日期：2009-12-29 14:37:41
上 传 者：
12313123ee
说明： 基于srt-2算法，利用verilog实现16位定点无符号数除法器（除数、被除数均由16位整数和16位小数组成，商由32位整数和16位小数构成，余数由32位小数组成）
(Based on srt-2 algorithm, using verilog to achieve 16-bit fixed-point unsigned divider (divisor, dividend by 16-bit integer and 16-bit decimal form, business from the 32-bit integer and 16-bit fractional composition, I composed a few from the 32-bit decimal))
文件列表:
5956447divider\divider\divider.v (649, 2007-12-20)
5956447divider\divider\div_ctl.v (1585, 2007-12-20)
5956447divider\divider\div_datapath.v (1991, 2007-12-20)
5956447divider\divider\div_tb.v (3007, 2007-12-20)
5956447divider\divider\read me.txt (88, 2008-04-19)
5956447divider\www.hxzi.com.txt (541, 2009-06-20)
5956447divider\divider (0, 2008-04-19)
5956447divider (0, 2009-12-29)
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