文件列表:

s21_IIR\introduce.txt (102, 2006-11-10)
s21_IIR\project\core.tpl (1328, 2006-10-05)
s21_IIR\project\device_usage_statistics.html (18405, 2009-06-23)
s21_IIR\project\genExpectedResults.cmd (33, 2006-10-05)
s21_IIR\project\iir.bgn (5164, 2009-06-23)
s21_IIR\project\iir.bit (212461, 2009-06-23)
s21_IIR\project\IIR.bld (867, 2009-06-23)
s21_IIR\project\IIR.cmd_log (2669, 2009-06-23)
s21_IIR\project\iir.drc (38, 2009-06-23)
s21_IIR\project\IIR.lso (6, 2006-10-05)
s21_IIR\project\IIR.mrp (190646, 2006-10-05)
s21_IIR\project\IIR.ncd (95306, 2009-06-23)
s21_IIR\project\IIR.ngc (48770, 2009-06-23)
s21_IIR\project\IIR.ngd (476294, 2009-06-23)
s21_IIR\project\IIR.ngm (693912, 2006-10-05)
s21_IIR\project\IIR.ngr (38184, 2009-06-23)
s21_IIR\project\IIR.pad (9725, 2009-06-23)
s21_IIR\project\IIR.par (5891, 2009-06-23)
s21_IIR\project\IIR.pcf (318, 2009-06-23)
s21_IIR\project\IIR.prj (49, 2009-06-23)
s21_IIR\project\IIR.stx (0, 2009-06-23)
s21_IIR\project\IIR.syr (19211, 2009-06-23)
s21_IIR\project\iir.twr (4251, 2009-06-23)
s21_IIR\project\iir.twx (22764, 2009-06-23)
s21_IIR\project\IIR.ucf (0, 1980-01-01)
s21_IIR\project\IIR.unroutes (148, 2009-06-23)
s21_IIR\project\IIR.ut (512, 2009-06-23)
s21_IIR\project\IIR.v (1927, 2006-10-05)
s21_IIR\project\IIR.xpi (46, 2009-06-23)
s21_IIR\project\IIR.xst (1111, 2009-06-23)
s21_IIR\project\IIR_guide.ncd (95306, 2009-06-23)
s21_IIR\project\IIR_last_par.ncd (95290, 2006-10-05)
s21_IIR\project\IIR_map.map (2584, 2009-06-23)
s21_IIR\project\IIR_map.mrp (189830, 2009-06-23)
s21_IIR\project\IIR_map.ncd (57305, 2009-06-23)
s21_IIR\project\IIR_map.ngm (686740, 2009-06-23)
s21_IIR\project\IIR_pad.csv (9757, 2009-06-23)
s21_IIR\project\IIR_pad.txt (42397, 2009-06-23)
s21_IIR\project\IIR_prev_built.ngd (476294, 2009-06-23)
s21_IIR\project\IIR_summary.html (6535, 2009-06-23)
... ...

The following files were generated for in directory D:\try\examples\IIR\project: mempp.mif: Memory Initialization File which is automatically generated by the CORE Generator System for some modules when a simulation flow is specified. A MIF data file is used to support HDL functional simulation of modules which use arrays of values. memlp.mif: Memory Initialization File which is automatically generated by the CORE Generator System for some modules when a simulation flow is specified. A MIF data file is used to support HDL functional simulation of modules which use arrays of values. multiply.edn: Electronic Data Netlist (EDN) file containing the information required to implement the module in a Xilinx (R) FPGA. multiply.vhd: VHDL wrapper file provided to support functional simulation. This file contains simulation model customization data that is passed to a parameterized simulation model for the core. multiply.vho: VHO template file containing code that can be used as a model for instantiating a CORE Generator module in a VHDL design. multiply.v: Verilog wrapper file provided to support functional simulation. This file contains simulation model customization data that is passed to a parameterized simulation model for the core. multiply.veo: VEO template file containing code that can be used as a model for instantiating a CORE Generator module in a Verilog design. multiply.asy: Graphical symbol information file. Used by the ISE tools and some third party tools to create a symbol representing the core. multiply.sym: Please see the core data sheet. multiply.xco: CORE Generator input file containing the parameters used to regenerate a core. multiply_flist.txt: Text file listing all of the output files produced when a customized core was generated in the CORE Generator. multiply_readme.txt: Text file indicating the files generated and how they are used. Please see the Xilinx CORE Generator online help for further details on generated files and how to use them.

近期下载者：

相关文件：

评论：[我要评论] [举报此文件]

收藏者：