VerilogCodingStylesForImprovedSimulationEfficiency
所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:46KB
下载次数:4
上传日期:2010-01-19 22:24:01
上 传 者:
bbsky
说明: This paper details different coding styles and their
impact on Verilog-XL simulation efficiency.This paper details different coding styles and their
impact on Verilog-XL simulation efficiency.
文件列表:
Verilog Coding Styles For Improved Simulation Efficiency pdf.pdf (60687, 2009-12-10)
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