vga_lcd_latest.tar
所属分类：VHDL/FPGA/Verilog
开发工具：LISP
文件大小：1754KB
下载次数：12
上传日期：2010-03-10 09:27:52
上 传 者：
yitaicc
说明： 此VGA/LCD控制器是revB.3版本的基于WISHBONE总线，适用于驱动CRT和LCD显示屏的嵌入式VGA驱动。
(VGA/LCD Controller core is a WISHBONE revB.3 compliant embedded VGA core capable of driving CRT and LCD displays. It supports user programmable resolutions and video timings, which are limited only by the available WISHBONE bandwidth. )
文件列表:
. (0, 2010-02-27)
.\vga_lcd (0, 2010-02-27)
.\vga_lcd\tags (0, 2010-02-27)
.\vga_lcd\tags\rel_1 (0, 2010-02-27)
.\vga_lcd\tags\rel_1\software (0, 2010-02-27)
.\vga_lcd\tags\rel_1\software\include (0, 2010-02-27)
.\vga_lcd\tags\rel_1\software\include\oc_vga_lcd.h (7298, 2001-11-22)
.\vga_lcd\tags\rel_1\bench (0, 2010-02-27)
.\vga_lcd\tags\rel_1\bench\verilog (0, 2010-02-27)
.\vga_lcd\tags\rel_1\bench\verilog\wb_mast_model.v (6396, 2001-08-21)
.\vga_lcd\tags\rel_1\bench\verilog\wb_model_defines.v (2933, 2001-08-21)
.\vga_lcd\tags\rel_1\bench\verilog\wb_slv_model.v (4981, 2002-02-07)
.\vga_lcd\tags\rel_1\bench\verilog\test_bench_top.v (14379, 2002-02-07)
.\vga_lcd\tags\rel_1\bench\verilog\tests.v (22562, 2002-04-20)
.\vga_lcd\tags\rel_1\bench\verilog\sync_check.v (6263, 2001-11-15)
.\vga_lcd\tags\rel_1\doc (0, 2010-02-27)
.\vga_lcd\tags\rel_1\doc\src (0, 2010-02-27)
.\vga_lcd\tags\rel_1\doc\src\vga_core_enh.doc (619008, 2002-04-20)
.\vga_lcd\tags\rel_1\doc\vga_core.pdf (358691, 2002-04-20)
.\vga_lcd\tags\rel_1\rtl (0, 2010-02-27)
.\vga_lcd\tags\rel_1\rtl\verilog (0, 2010-02-27)
.\vga_lcd\tags\rel_1\rtl\verilog\vga_wb_slave.v (14242, 2002-04-20)
.\vga_lcd\tags\rel_1\rtl\verilog\vga_wb_master.v (19874, 2002-04-20)
.\vga_lcd\tags\rel_1\rtl\verilog\vga_colproc.v (12877, 2002-03-04)
.\vga_lcd\tags\rel_1\rtl\verilog\vga_defines.v (2925, 2002-02-07)
.\vga_lcd\tags\rel_1\rtl\verilog\vga_pgen.v (5896, 2002-04-05)
.\vga_lcd\tags\rel_1\rtl\verilog\vga_curproc.v (9397, 2002-03-05)
.\vga_lcd\tags\rel_1\rtl\verilog\generic_spram.v (10016, 2001-10-16)
.\vga_lcd\tags\rel_1\rtl\verilog\vga_cur_cregs.v (4481, 2002-03-05)
.\vga_lcd\tags\rel_1\rtl\verilog\vga_fifo.v (4509, 2002-02-07)
.\vga_lcd\tags\rel_1\rtl\verilog\ro_cnt.v (3834, 2002-01-28)
.\vga_lcd\tags\rel_1\rtl\verilog\timescale.v (25, 2001-08-21)
.\vga_lcd\tags\rel_1\rtl\verilog\vga_csm_pb.v (5084, 2002-02-07)
.\vga_lcd\tags\rel_1\rtl\verilog\vga_enh_top.v (13112, 2002-03-04)
.\vga_lcd\tags\rel_1\rtl\verilog\vga_fifo_dc.v (5205, 2002-01-28)
.\vga_lcd\tags\rel_1\rtl\verilog\vga_tgen.v (4919, 2002-01-28)
.\vga_lcd\tags\rel_1\rtl\verilog\ud_cnt.v (3846, 2002-01-28)
.\vga_lcd\tags\rel_1\rtl\verilog\generic_dpram.v (11400, 2001-10-16)
.\vga_lcd\tags\rel_1\rtl\verilog\vga_vtim.v (4770, 2002-04-20)
.\vga_lcd\tags\rel_1\rtl\vhdl (0, 2010-02-27)
... ...
近期下载者：
相关文件：
收藏者：