Verilogtestbench
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：78KB
下载次数：30
上传日期：2010-04-02 21:37:41
上 传 者：
gaolai
说明： no intro
(Aviation Microelectronic Center, Northwestern Polytechnical University, testbench on how to write a paper. . Paper combined with a design of ATM test platform TESTBENCH discussed TESTBENCH structure and bus functional model (BFM), and use the BFM model TESTBENCH design strategies and methods
Discussed, hoping to help the vast number of designers.)
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Verilog testbench设计技巧和策略.PDF (325072, 2010-02-07)
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