PIPE_LINING_CPU_TEAM_24
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：4831KB
下载次数：85
上传日期：2010-04-15 13:01:46
上 传 者：
sjm
说明： 采用Quatus II编译环境，使用Verilog HDL语言编写实现了五段流水线CPU。
能够完成以下二十二条指令（均不考虑虚拟地址和Cache，并且默认为小端方式）：
add rd,rs,rt addu rd,rs,rt addi rt,rs,imm addiu rt,rs,imm sub rd,rs,rt
subu rd,rs,rt nor rd,rs,rt xori rt,rs,imm clo rd,rs clz rd,rs
slt rd,rs,rt sltu rd,rs,rt slti rt,rs,imm sltiu rt,rs,imm sllv rd,rt,rs
sra rd,rt,shamt blez rs,imm j target lwl rt,offset(base)
lwl rt,offset(base) lw rt,imm(rs) sw rt,imm(rs)
在本设计中，采取非常良好的模块化编程风格，共分十三个主要模块PIPE_LINING_CPU_TEAM_24.v为顶层实体文件，对应为PIPE_LINING_CPU_TEAM_24模块作为顶层实体模块，如下：
ifetch.v、regdec.v、exec.v、mem.v、wr.v分别实现五个流水段；
cpuctr.v用于产生CPU控制信号；
ALU.v用于对操作数进行相应指令的运算并输出结果；
DM.v数据存储器
IM.v指令存储器
datareg.v数据寄存器堆
extender.v位扩展
yiwei_32bits.v 实现32位四种移位方式的移位器
在顶层实体中，调用ifetch.v、regdec.v、exec.v、mem.v、wr.v这五个模块就实现了流水线CPU。顶层模块的结构清晰明了。对于学习verilog编程非常有用~~
( Quatus II compiled by the environment, using Verilog HDL language to achieve a five-stage pipeline CPU.
To complete the following 22 commands (not considering the virtual address and Cache, and the default mode for the small end):
add rd, rs, rt addu rd, rs, rt addi rt, rs, imm addiu rt, rs, imm sub rd, rs, rt
subu rd, rs, rt nor rd, rs, rt xori rt, rs, imm clo rd, rs clz rd, rs
slt rd, rs, rt sltu rd, rs, rt slti rt, rs, imm sltiu rt, rs, imm sllv rd, rt, rs
sra rd, rt, shamt blez rs, imm j target lwl rt, offset (base)
lwl rt, offset (base) lw rt, imm (rs) sw rt, imm (rs)
In this design, take a very good modular programming style, is divided into 13 main modules PIPE_LINING_CPU_TEAM_24.v for the top-level entity file, the corresponding module as a top-level entity for the PIPE_LINING_CPU_TEAM_24 modules, as follows:
ifetch.v, regdec.v, exec.v, mem.v, wr.v water were to achieve the five paragraph
cpuctr.v used to generate CPU control signal
ALU.v accordingly )
文件列表:
PIPE_LINING_CPU_TEAM_24\ALU.v (7320, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\ALU.v.bak (7318, 2009-12-23)
PIPE_LINING_CPU_TEAM_24\cpuctr.v (8031, 2010-01-07)
PIPE_LINING_CPU_TEAM_24\cpuctr.v.bak (7587, 2009-12-23)
PIPE_LINING_CPU_TEAM_24\datareg.v (1279, 2010-01-07)
PIPE_LINING_CPU_TEAM_24\datareg.v.bak (1212, 2009-12-25)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(0).cnf.cdb (24150, 2010-01-07)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(0).cnf.hdb (10612, 2010-01-07)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(1).cnf.cdb (4507, 2010-01-07)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(1).cnf.hdb (1668, 2010-01-07)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(10).cnf.cdb (1634, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(10).cnf.hdb (979, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(11).cnf.cdb (1826, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(11).cnf.hdb (1078, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(12).cnf.cdb (1650, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(12).cnf.hdb (979, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(13).cnf.cdb (1431, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(13).cnf.hdb (964, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(14).cnf.cdb (1551, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(14).cnf.hdb (963, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(15).cnf.cdb (16348, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(15).cnf.hdb (1390, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(16).cnf.cdb (16418, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(16).cnf.hdb (1394, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(17).cnf.cdb (1680, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(17).cnf.hdb (1043, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(18).cnf.cdb (1495, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(18).cnf.hdb (990, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(19).cnf.cdb (1894, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(19).cnf.hdb (1170, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(2).cnf.cdb (30333, 2010-01-07)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(2).cnf.hdb (4845, 2010-01-07)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(20).cnf.cdb (15515, 2010-01-07)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(20).cnf.hdb (2927, 2010-01-07)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(21).cnf.cdb (691, 2010-01-07)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(21).cnf.hdb (688, 2010-01-07)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(22).cnf.cdb (1897, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(22).cnf.hdb (1173, 2009-12-24)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(23).cnf.cdb (3132, 2010-01-07)
PIPE_LINING_CPU_TEAM_24\db\PIPE_LINING_CPU_TEAM_24.(23).cnf.hdb (1317, 2010-01-07)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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