LCD1602_Verilog
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：750KB
下载次数：151
上传日期：2010-04-15 16:51:49
上 传 者：
lipeixinmm
说明： 1602源代码 Verilog 文件调用的全部程序
(1602 Verilog)
文件列表:
LCD1602_Verilog\.sopc_builder\filters.xml (65, 2009-09-03)
LCD1602_Verilog\Clock_Gen.v (1521, 2010-04-11)
LCD1602_Verilog\Clock_Gen.v.bak (1547, 2010-04-11)
LCD1602_Verilog\db\LCD_Top.(0).cnf.cdb (1121, 2010-04-11)
LCD1602_Verilog\db\LCD_Top.(0).cnf.hdb (861, 2010-04-11)
LCD1602_Verilog\db\LCD_Top.(1).cnf.cdb (2844, 2010-04-11)
LCD1602_Verilog\db\LCD_Top.(1).cnf.hdb (956, 2010-04-11)
LCD1602_Verilog\db\LCD_Top.(2).cnf.cdb (29482, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.(2).cnf.hdb (4644, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.asm.qmsg (2451, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.asm_labs.ddb (7103, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.cbx.xml (89, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.cmp.bpm (648, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.cmp.cdb (55591, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.cmp.ecobp (28, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.cmp.hdb (15589, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.cmp.kpt (338, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.cmp.logdb (4, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.cmp.rdb (25235, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.cmp.tdb (42469, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.cmp0.ddb (142822, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.cmp2.ddb (48027, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.cmp_merge.kpt (344, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.db_info (151, 2010-04-10)
LCD1602_Verilog\db\LCD_Top.eco.cdb (175, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.fit.qmsg (30442, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.hier_info (17589, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.hif (2355, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.lpc.html (1191, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.lpc.rdb (452, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.lpc.txt (1696, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.map.bpm (636, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.map.cdb (16457, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.map.ecobp (28, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.map.hdb (15289, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.map.kpt (118220, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.map.logdb (4, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.map.qmsg (8232, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.map_bb.cdb (697, 2010-04-13)
LCD1602_Verilog\db\LCD_Top.map_bb.hdb (6822, 2010-04-13)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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