文件列表:

. (0, 2010-02-27)
.\spi (0, 2010-02-27)
.\spi\tags (0, 2010-02-27)
.\spi\tags\rel_2 (0, 2010-02-27)
.\spi\tags\rel_2\bench (0, 2010-02-27)
.\spi\tags\rel_2\bench\verilog (0, 2010-02-27)
.\spi\tags\rel_2\bench\verilog\wb_master_model.v (5722, 2002-06-12)
.\spi\tags\rel_2\bench\verilog\tb_spi_top.v (12193, 2003-04-16)
.\spi\tags\rel_2\bench\verilog\spi_slave_model.v (3637, 2003-03-27)
.\spi\tags\rel_2\doc (0, 2010-02-27)
.\spi\tags\rel_2\doc\src (0, 2010-02-27)
.\spi\tags\rel_2\doc\src\spi.doc (1513472, 2003-04-16)
.\spi\tags\rel_2\doc\spi.pdf (80127, 2003-04-16)
.\spi\tags\rel_2\rtl (0, 2010-02-27)
.\spi\tags\rel_2\rtl\verilog (0, 2010-02-27)
.\spi\tags\rel_2\rtl\verilog\spi_clgen.v (5123, 2003-04-16)
.\spi\tags\rel_2\rtl\verilog\timescale.v (23, 2002-06-12)
.\spi\tags\rel_2\rtl\verilog\spi_defines.v (4358, 2003-04-16)
.\spi\tags\rel_2\rtl\verilog\spi_shift.v (6922, 2003-04-16)
.\spi\tags\rel_2\rtl\verilog\spi_top.v (11064, 2003-05-26)
.\spi\tags\rel_2\sim (0, 2010-02-27)
.\spi\tags\rel_2\sim\run (0, 2010-02-27)
.\spi\tags\rel_2\sim\run\sim (369, 2002-06-12)
.\spi\tags\rel_2\sim\run\tcl.scr (154, 2002-06-12)
.\spi\tags\initial (0, 2010-02-27)
.\spi\tags\initial\bench (0, 2010-02-27)
.\spi\tags\initial\bench\verilog (0, 2010-02-27)
.\spi\tags\initial\bench\verilog\wb_master_model.v (5722, 2002-06-12)
.\spi\tags\initial\bench\verilog\tb_spi_top.v (14427, 2002-06-12)
.\spi\tags\initial\bench\verilog\spi_slave_model.v (3628, 2002-06-12)
.\spi\tags\initial\doc (0, 2010-02-27)
.\spi\tags\initial\doc\src (0, 2010-02-27)
.\spi\tags\initial\doc\src\spi.doc (5814272, 2002-06-12)
.\spi\tags\initial\rtl (0, 2010-02-27)
.\spi\tags\initial\rtl\verilog (0, 2010-02-27)
.\spi\tags\initial\rtl\verilog\spi_clgen.v (4940, 2002-06-12)
.\spi\tags\initial\rtl\verilog\timescale.v (23, 2002-06-12)
.\spi\tags\initial\rtl\verilog\spi_defines.v (3914, 2002-06-12)
.\spi\tags\initial\rtl\verilog\spi_shift.v (6419, 2002-06-12)
.\spi\tags\initial\rtl\verilog\spi_top.v (10097, 2002-06-12)
... ...

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