qdq_new
所属分类:VHDL/FPGA/Verilog
开发工具:Windows_Unix
文件大小:64KB
下载次数:26
上传日期:2005-09-27 19:38:34
上 传 者:
管理员
说明: 采用Verilog HDL设计,在掌宇智能开发板上得到实现
根据抢答器的原理,整个电路可划分为三部分:采样电路、门控电路和译码电路
( Uses Verilog the HDL design, obtains the realization basis on
the palm space intelligence development board to snatch the answering
principle, the entire electric circuit may divide is three parts: The
sampling electric circuit, the gate control the electric circuit and
the decoding circuit )
文件列表:
qdq\decoder.acf (15767, 2002-12-30)
qdq\decoder.cnf (23395, 2002-12-30)
qdq\decoder.fit (8177, 2002-12-30)
qdq\decoder.hex (34004, 2002-12-30)
qdq\decoder.hif (1578, 2003-04-11)
qdq\decoder.mmf (344, 2002-12-30)
qdq\decoder.ndb (7430, 2002-12-30)
qdq\decoder.pin (5238, 2002-12-30)
qdq\decoder.pof (55242, 2002-12-30)
qdq\decoder.rpt (27116, 2002-12-30)
qdq\decoder.scf (1913, 2002-12-30)
qdq\decoder.snf (18971, 2002-12-30)
qdq\decoder.sof (14434, 2002-12-30)
qdq\decoder.sym (558, 2003-04-11)
qdq\decoder.ttf (59691, 2002-12-30)
qdq\decoder.v (955, 2003-04-11)
qdq\LIB.DLS (43, 2003-04-11)
qdq\qdq(1).cnf (23395, 2003-04-11)
qdq\qdq.acf (16214, 2003-04-11)
qdq\qdq.cnf (7642, 2003-04-11)
qdq\qdq.fit (10396, 2003-04-11)
qdq\qdq.gdf (9126, 2003-04-11)
qdq\qdq.hex (34004, 2003-04-11)
qdq\qdq.hif (1668, 2004-04-16)
qdq\qdq.mmf (125, 2003-04-11)
qdq\qdq.ndb (8115, 2003-04-11)
qdq\qdq.pin (5234, 2003-04-11)
qdq\qdq.pof (55238, 2003-04-11)
qdq\qdq.rpt (32352, 2003-04-11)
qdq\qdq.scf (1205, 2002-12-30)
qdq\qdq.snf (27850, 2003-04-11)
qdq\qdq.sof (14431, 2003-04-11)
qdq\qdq.ttf (59691, 2003-04-11)
qdq\U1593729.DLS (8269, 2003-04-11)
qdq\操作和引脚说明.doc (19456, 2003-04-11)
qdq (0, 2005-08-30)
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