DE2_Default
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：8594KB
下载次数：3
上传日期：2010-06-01 15:10:29
上 传 者：
winnie_688
说明： 自己编程的采用verilog语言实现的关于altera的DE2-70开发板的一个实用程序，实现的是自动售货机的找零功能
(Own programming language used on the altera verilog the DE2-70 development board of a utility, to achieve the change for vending machines function)
文件列表:
DE2_Default\AUDIO_DAC.v (8754, 2005-08-15)
DE2_Default\DE2_Default.v.bak (16887, 2009-11-05)
DE2_Default\DE2_Default.cdf (304, 2007-12-03)
DE2_Default\DE2_Default.done (26, 2009-11-06)
DE2_Default\DE2_Default.v (16893, 2009-11-05)
DE2_Default\DE2_Default.fit.smsg (513, 2009-11-06)
DE2_Default\DE2_Default.fit.summary (614, 2009-11-06)
DE2_Default\DE2_Default.map.rpt (54561, 2009-11-06)
DE2_Default\DE2_Default.flow.rpt (5606, 2009-11-06)
DE2_Default\DE2_Default.map.summary (467, 2009-11-06)
DE2_Default\DE2_Default.pin (79179, 2009-11-06)
DE2_Default\DE2_Default.pof (2097339, 2009-11-06)
DE2_Default\DE2_Default.qpf (951, 2005-09-11)
DE2_Default\DE2_Default.qsf (24597, 2009-11-08)
DE2_Default\DE2_Default.fit.rpt (446383, 2009-11-06)
DE2_Default\DE2_Default.sof (841090, 2009-11-06)
DE2_Default\DE2_Default.tan.rpt (614061, 2007-12-03)
DE2_Default\DE2_Default.tan.summary (4518, 2007-12-03)
DE2_Default\codeclock.vhd (3877, 2009-11-06)
DE2_Default\DE2_Default_assignment_defaults.qdf (27091, 2007-12-02)
DE2_Default\I2C_AV_Config.v (4775, 2006-01-07)
DE2_Default\I2C_Controller.v (3885, 2005-08-30)
DE2_Default\Img_DATA.hex (576013, 2005-09-12)
DE2_Default\LCD_Controller.v (1477, 2005-08-25)
DE2_Default\LCD_TEST.v (3168, 2006-01-07)
DE2_Default\Reset_Delay.v (233, 2005-12-13)
DE2_Default\SEG7_LUT.v (705, 2005-09-17)
DE2_Default\SEG7_LUT_8.v (458, 2005-08-25)
DE2_Default\VGA_Audio_PLL.v (11713, 2005-12-14)
DE2_Default\VGA_Controller\Img_DATA.hex (576013, 2005-09-13)
DE2_Default\VGA_Controller\Img_RAM.v (9298, 2005-08-25)
DE2_Default\VGA_Controller\VGA_Controller.v (4252, 2005-12-11)
DE2_Default\VGA_Controller\VGA_OSD_RAM.v (1497, 2005-08-13)
DE2_Default\VGA_Controller\VGA_Param.h (489, 2005-08-13)
DE2_Default\db\altsyncram_p132.tdf (106119, 2009-11-05)
DE2_Default\db\altsyncram_q7o1.tdf (2737, 2009-11-05)
DE2_Default\db\altsyncram_vpv.tdf (14015, 2009-11-05)
DE2_Default\db\DE2_Default.hier_info (24263, 2009-11-06)
DE2_Default\db\DE2_Default.(4).cnf.hdb (869, 2009-11-05)
... ...
DE2_Default
-----------
This design is the initial design when the board is powered-up. It increments a counter and displays the value on the
7-segment displays and LEDs. An image is also displayed on the VGA port.
Running the Design
------------------
1) Launch the Quartus II software.
2) Open the DE2_Default.qpf project located in the \DE2_Default folder. (File menu -> Open Project)
3) Open the Programmer window. (Tools menu -> Programmer)
4) The DE2_Default.sof programming file should be listed.
Check the 'Program/Configure' box and set up the JTAG programming hardware connection via the 'Hardware Setup' button.
5) Press 'Start' to start programming. The design should now be programmed and running.
User Inputs to the Design
-------------------------
None.
Compiling the Design
--------------------
1) Launch the Quartus II software.
2) Open the DE2_Default.qpf project located in the \DE2_Default folder. (File menu -> Open Project)
3) Start compilation. (Processing -> Start Compilation)
4) After compilation is finished, you can run the design with the generated SOF file. See 'Running the Design' above.
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