文件列表:

INSTALL.BAT (2091, 1994-05-16)
DETECT.EXE (11872, 1991-02-28)
L.ADR (5715, 1994-05-11)
L.LOC (834, 1993-12-12)
PLL.BAT (209, 1991-11-07)
PLL_BODY.EXE (286384, 1994-05-11)
VCO_CALC.TXT (3381, 1994-05-16)
VCO4046A.WK1 (5651, 1994-05-11)
VCO9046A.WK1 (5632, 1994-05-11)

HCMOS PHASE-LOCKED LOOP DESIGN PROGRAM ====================================== Revised and updated version 2.0 for HC/HCT4046/7046A and HCT9046A. INTRODUCTION ------------ This file will give you some more information about the PLL design program. It can be printed by typing : TYPE README > PRN and then striking the key. This diskette enables you to design a complete HCMOS-based PLL including peripheral components. It's for use with Philips' 74HC/HCT4046A,7046A and 74HCT9046A HCMOS circuits, but it can also be used to evaluate and modify existing designs, for example with the HEF4046. In this revised version, a choice for PLL loop parameters can be made between the HC/HCT4046/7046A and the new HCT9046A type with improved bandgap controlled VCO and charge pump current output on PC2 to avoid any dead zone operation. Besides giving you an approximation of a loop's complete dynamic behaviour, the program can generate a Bode plot to check loop stability. All calculations are done with equations which are derived for high-gain loops and most of them can be found in literature, e.g. in 'Phaselock techniques', Wiley, New York, 1979, Mr.Floyd Gardner and in 'Phase-locked loops', McGraw-Hill, New-York, 1***4, Mr. Roland Best. By eliminating much of the calculation drudgery of PLL design, the program invites you to experiment but will still reduce design time. This program is tailored to the Philips 74HC/HCT4046A/7046A and HCT9046A devices and does not guarantee that other brands of '4046 will respond as calculated by this program. The program runs on every PC-DOS or MS-DOS compatible PC with a colour or monochrome monitor. To benefit from all the features of the program, a graphics card and/or an EPSON or IBM compatible printer is needed, but these are not essential. The following graphic cards or compatibles are supported : - CGA - EGA - HERCULES - VGA - PC3270 - SVGA/XVGA - MCGA STARTING THE PROGRAM -------------------- To start the program, simply insert the diskette into drive A or B. No installation procedure is required. With the program at the default directory, type : PLL and strike the key. Further instructions for using your PLL diskette are explained on-screen. If you have a hard disk you can copy all necessary files in a sub-directory C:\PLL by simply typing : INSTALL and then striking the key. To find out which graphics card is in your PC, type : DETECT and strike the key. If no information is generated, your graphics card is probably unsuitable for the program. That means, a bode plot may not be given or can not be send to the printer. ABOUT THE PROGRAM ----------------- After some introductory text when you start the program, you will see an elementary PLL block diagram and the pinning description. Then you are asked to enter some basic design parameters such as the input frequency, and whether you require a frequency divider in the feedback. Use the on-line 'help' facility if a question is unclear. In any case, you can always return to the previous question and alter data, should you make a mistake. When you have entered all the basic system parameters, calculation starts, after which the results are displayed. You can then optimize the loop and examine its stability. MESSAGES -------- During a calculation, three messages can appear on the screen: - a MESSAGE, this informs you about certain decisions or alterations made during a calculation. - a WARNING which informs you about possible problems that can arise with the current values of the parameters and how you can solve them, or how the program has solved them. A warning during optimizing will often result in an altered calculated parameter with respect to the input value. - an ERROR which informs you of an error during a calculation or that the loop will fail to operate with the current values of parameters. Unlike a warning which can be ignored, an error message must be obeyed. RESULTS ------- The results are presented in three groups on your screen : - the main system parameters you specified. - the calculated values of the external bias components for the VCO, and the values of the loop filter components and constants. - the calculated dynamic loop parameters. OPTIMIZE -------- An extremely useful feature of the program is the ability to tailor the loop parameters to your specification quickly. A somewhat tedious process when done manually, owing to the interdependency of the loop parameters. This is why PLL's were not always fully optimized in the past. With the program sixteen parameters can be altered individually, the new values of the dependent parameters being calculated automatically. Before optimizing starts, the selected parameter is described and you can abort the optimizing before any alterations are made. In order to rearrange the loop such that the desired result is obtained, one of the two main loop parameters, Wn or zeta, is altered. This can often only be done by approximation. If the total loop is recalculated with the altered value of Wn or zeta, the desired result may not be obtained completely. Re-entering the original value will usually produce the desired result. If a WARNING message appears during the calculation, it is likely that the inserted value also has been changed. This can indicate that it is impossible to obtain the inserted value with the present configuration. However, if the parameter being optimized depends on both Wn and zeta, only one of them is altered as indicated in the 'General information and warning' screen. Changing the other main loop parameter via optimize, will often help to get closer to the desired result. After optimization, you can print the results. The program will ask you for a title for your application and print this above the results together with the current date, assuming you have set your system date correctly. If your PC has a suitable graphics card, you can generate a Bode plot of the open loop to examine the loop stability. If the stability is inadequate, you can return to the optimization menu and make further alterations to the design. One option in the optimization menu can be used to evaluate existing designs. First, enter the system information in the usual way and let the program calculate its own values of filter components. Then select option 10 and enter the values of the components in your existing filter and start the calculations again to obtain a complete analysis of an existing loop. WORLD-WIDE SALES ORGANIZATIONS ------------------------------ At the end of the program a complete list is shown of the world-wide PHILIPS sales organizations, which can supply more information on HCMOS products. This list is available on the disk as a separate, printable text file L.adr. You may also add local information in the file L.loc. For full design data, refer to : - PHILIPS High-speed CMOS Logic data handbook IC06. - PHILIPS Technical Publication, PHASE LOCKED LOOP CIRCUITS 74HC/HCT4046A & 74HC/HCT7046A, ordering code 93*** ***9 90011. Besides providing an extensive description of the HCMOS PLL circuits, this publication explains the PLL theory behind the design program in detail. This PLL design-aid diskette is not copy protected and can be freely distributed. Duplicate the entire diskette using the DOS 'DISKCOPY' command or similar utility. ACKNOWLEDGEMENTS ---------------- This program was created by Rob Volgers, Philips CMOS Logic dept Nijmegen, with support from Wim Rosink of the Philips Application Lab (PCALE) in Eindhoven on some mathematical items. We also wants to thank Mr. R.C. den Dulk of the Technical University of Delft for reviewing the diskette. Updating for version 2.0 for use with the HCT9046A was done by Rafal Szmidt and Wim Rosink at PCALE in Eindhoven. VERSION 2.0 ----------- Version 2.0 of this program is basically the same as version 1.1. But text files were revised and the program was updated to include the recently introduced 74HCT9046A with improved VCO and PC2 with current charge output. Some other corrections and added features are: * Shows pin configuration and filter options for the HCT9046A. * Includes VCO parameters for the HCT9046A to calculate its RC components. * Screen driver files are now included in the main program. * Graphics works now also with VGA and SVGA screens. * The maximum value for the divider ratio is increased to Nmax = 500000. * Help screens with revised and improved information, eg. about the divider option with variable N. Limit for Nmax/Nmin depends on spread parameters. The selected ratio N for calculation is also shown now as N_used. * Address info now also available as a text file outside the main program. Further we have added to the package two 1-2-3 spread sheet files which can calculate the frequency for a given set of R's and C's. File VCO4046A.WK1 contains the specific parameters for the HC4046/7046A and VCO9046A.WK1 for the HCT9046A. See the separate file VCO_CALC.TXT for further details. DISCLAIMER ---------- The Information presented on this disk does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. PACKAGE PRICE AND REGISTRATION ------------------------------ The price to be paid for this package should not exceed the cost of reproduction plus related cost as usual for shareware programs. There is no need to register even if you use this program on a daily basis. Order PHILIPS PLL IC's (and any other products from our portfolio) and we will be more than happy. For this purpose, or if you want more information, you may contact any of the PHILIPS representatives mentioned on the disk or authorised distributors. 

近期下载者：

相关文件：

评论：[我要评论] [举报此文件]

收藏者：