filter 代码
所属分类：VHDL/FPGA/Verilog
开发工具：Windows_Unix
文件大小：217KB
下载次数：144
上传日期：2005-11-07 22:44:02
上 传 者：
lokay
说明： 用verilog实现滤波器的功能，通过软件综合仿真，在利用FPGA实现
(using Verilog filter function to achieve through integrated simulation software, the use of FPGA)
文件列表:
filter\basicfir.fda (7090, 2005-11-03)
filter\filter.vhd (37316, 2005-11-03)
filter\filter_tb.vhd (410494, 2005-11-03)
filter\vsim.wlf (106496, 2005-11-03)
filter\work\filter\rtl.asm (199578, 2005-11-03)
filter\work\filter\rtl.dat (23305, 2005-11-03)
filter\work\filter\_primary.dat (315, 2005-11-03)
filter\work\filter (0, 2005-11-03)
filter\work\filter_tb\test.asm (1443967, 2005-11-03)
filter\work\filter_tb\test.dat (338763, 2005-11-03)
filter\work\filter_tb\_primary.dat (135, 2005-11-03)
filter\work\filter_tb (0, 2005-11-03)
filter\work\_info (1056, 2005-11-03)
filter\work (0, 2005-11-03)
filter (0, 2005-11-03)
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