xapp394
所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:1596KB
下载次数:10
上传日期:2010-08-05 22:58:56
上 传 者:
md4work
说明: this is good sample for cplds.
文件列表:
mobile_sdram.npl (1365, 2003-02-10)
time_sim.do (748, 2003-02-10)
wave_post.do (2727, 2003-02-06)
mobile_sdram.rpt (82928, 2003-02-10)
mobile_sdram.tim (40040, 2003-02-10)
mobile_sdram.vhd (21710, 2003-02-10)
mobile_sdram_tb.vhd (8332, 2003-02-06)
mobile_sdram_timesim.vhd (303851, 2003-02-10)
mt48v16m16lf.vhd (53284, 2003-01-31)
pkg_constants.vhd (1753, 2003-02-05)
upcnt2.vhd (1536, 2003-01-29)
upcnt4.vhd (1536, 2003-01-29)
MobileY26L_A.pdf (1485993, 2003-01-16)
modelsim_wave.jpg (390480, 2003-02-06)
******************************************************************************************************
README File for XAPP394 CoolRunner-II CPLD Mobile SDRAM Interface
Created: 2-10-03 JLJ
*******************************************************************************************************
*******************************************************************************************************
DISCLAIMER
*******************************************************************************************************
THIS DESIGN IS PROVIDED TO YOU “AS IS”. XILINX MAKES AND YOU RECEIVE NO WARRANTIES OR
CONDITIONS, EXPRESS, IMPLIED, STATUTORY OR OTHERWISE, AND XILINX SPECIFICALLY DISCLAIMS ANY
IMPLIED WARRANTIES OF MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR A PARTICULAR
PURPOSE. This design has not been verified on hardware (as opposed to simulations), and it should be
used only as an example design, not as a fully functional core. XILINX does not warrant the
performance, functionality, or operation of this Design will meet your requirements, or that the
operation of the Design will be uninterrupted or error free, or that defects in
the Design will be corrected. Furthermore, XILINX does not warrant or make any representations
regarding use or the results of the use of the Design in terms of correctness, accuracy,
reliability or otherwise.
********************************************************************************************************
FILE CONTENTS
********************************************************************************************************
This zip file contains the following:
VHDL Source Files:
mobile_sdram.vhd -- Top level Mobile SDRAM design file.
upcnt2.vhd -- 2-bit counter.
upcnt4.vhd -- 4-bit counter.
VHDL Testbench Files:
mobile_sdram_tb.vhd -- SDRAM test bench.
mt48v16m16lf.vhd -- Micron Mobile SDRAM VHDL model.
pkg_constants.vhd -- VHDL package file for test constants.
WebPACK Files:
mobile_sdram.npl -- WebPACK Project Navigator project file.
mobile_sdram.rpt -- WebPACK fitter report.
mobile_sdram.tim -- WebPACK timing report file.
mobile_sdram_timesim.vhd -- WebPACK post route VHDL timing file.
ModelSim DO Files:
time_sim.do -- Post route timing simulation file.
wave_post.do -- Configures Modelsim wave window for post-route simulation.
Documentation Files:
MobileY26L_A.pdf -- Micron Mobile SDRAM data sheet.
modelsim_wave.jpg -- Screen capture of ModelSim post route timing simulation.
*****************************************************************************************************
TESTING NOTES
*****************************************************************************************************
When utilizing the test benches in Project Navigator, ModelSim is used for simulation purposes.
Note: If any changes are made to any of the above files, they must be recompiled and loaded in
ModelSim.
******************************************************************************************************
DESIGN NOTES
******************************************************************************************************
Complete documentation for the design can be found in XAPP394 available for download from the
Xilinx web site (www.xilinx.com).
******************************************************************************************************
Technical Support
******************************************************************************************************
Technical support for this design and any other CoolRunner CPLD issues can be obtained as follows:
North American Support
(Mon,Tues,Wed,Fri 6:30am-5pm
Thr 6:30am - 4:00pm Pacific Standard Time)
Hotline: 1-800-255-7778
or (408) 879-5199
Fax: (408) 879-4442
Email: hotline@xilinx.com
United Kingdom Support
(Mon,Tues,Wed,Thr 9:00am-12:00pm, 1:00-5:30pm
Fri 9:00am-12:00pm, 1:00-3:30pm)
Hotline: +44 1932 820821
Fax: +44 1932 828522
Email : ukhelp@xilinx.com
France Support
(Mon,Tues,Wed,Thr,Fri 9:30am-12:30pm, 2:00-5:30pm)
Hotline: +33 1 3463 0100
Fax: +33 1 3463 0959
Email : frhelp@xilinx.com
Germany Support
(Mon,Tues,Wed,Thr 8:00am-12:00pm, 1:00-5:00pm,
Fri 8:00am-12:00pm, 1:00pm-3:00pm)
Hotline: +49 89 991 54930
Fax: +49 89 904 4748
Email : dlhelp@xilinx.com
Japan Support
(Mon,Tues,Thu,Fri 9:00am -5:00pm ()
Wed 9:00am -4:00pm)
Hotline: (81)3-3297-9163
Fax:: (81)3-3297-0067
Email: jhotline@xilinx.com
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