parallel_CRC_code
所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:1KB
下载次数:6
上传日期:2010-08-28 17:46:02
上 传 者:
sankarmk
说明: CRC Generation can be done by using PARALLELISM.
Efficient method to calculate CRC in less time. By using more hardware for parallel CRC and obtaining more latency and throughput.
文件列表:
parallel CRC code\crcmaincode.vhd (1863, 2010-08-28)
parallel CRC code\crcpackage.vhd (384, 2010-08-28)
近期下载者:
相关文件:
收藏者: