RTC
所属分类：VHDL/FPGA/Verilog
开发工具：Windows_Unix
文件大小：2181KB
下载次数：31
上传日期：2010-09-20 19:58:18
上 传 者：
eagle8610
说明： actel fpga开发板fusion startkit实验例程，包含完整工程文件几verilog HDL 源码
(actel fpga development board fusion startkit test routines, including the complete works of several verilog HDL source file)
文件列表:
RTC实验\Project\RTC_Test\assert.log (200, 2007-10-11)
RTC实验\Project\RTC_Test\constraint\RTC_Test_Top_sdc.sdc (466, 2007-08-27)
RTC实验\Project\RTC_Test\designer\impl1\designer.log (17978, 2007-10-11)
RTC实验\Project\RTC_Test\designer\impl1\designer_genhdl.log (1037, 2007-10-10)
RTC实验\Project\RTC_Test\designer\impl1\designer_gen_ba.log (494, 2007-10-11)
RTC实验\Project\RTC_Test\designer\impl1\RTC_Test_Top.adb (1576448, 2007-10-11)
RTC实验\Project\RTC_Test\designer\impl1\RTC_Test_Top.dtf\verify.log (233, 2007-10-11)
RTC实验\Project\RTC_Test\designer\impl1\RTC_Test_Top.ide_des (681, 2007-10-11)
RTC实验\Project\RTC_Test\designer\impl1\RTC_Test_Top.pdb (125440, 2007-10-11)
RTC实验\Project\RTC_Test\designer\impl1\RTC_Test_Top.pdb.depends (80, 2007-10-11)
RTC实验\Project\RTC_Test\designer\impl1\RTC_Test_Top.tcl (336, 2007-10-11)
RTC实验\Project\RTC_Test\designer\impl1\RTC_Test_Top_ba.sdf (866953, 2007-10-11)
RTC实验\Project\RTC_Test\designer\impl1\RTC_Test_Top_ba.v (790954, 2007-10-11)
RTC实验\Project\RTC_Test\designer\impl1\RTC_Test_Top_fp\$$FlashPro_FPBBALTLPT1.L$$ (1375, 2007-10-11)
RTC实验\Project\RTC_Test\designer\impl1\RTC_Test_Top_fp\projectData\RTC_Test_Top.pdb (120320, 2007-09-07)
RTC实验\Project\RTC_Test\designer\impl1\RTC_Test_Top_fp\RTC_Test_Top.log (931, 2007-10-11)
RTC实验\Project\RTC_Test\designer\impl1\RTC_Test_Top_fp\RTC_Test_Top.pro (1569, 2007-12-17)
RTC实验\Project\RTC_Test\designer\新建文件夹\RTC_Test_Top.pdb (125440, 2007-10-11)
RTC实验\Project\RTC_Test\designer\新建文件夹\说明.txt (129, 2007-10-11)
RTC实验\Project\RTC_Test\designer\新建文件夹 (2)\RTC_Test_Top.pdb (125440, 2007-10-11)
RTC实验\Project\RTC_Test\designer\新建文件夹 (2)\说明.txt (88, 2007-10-11)
RTC实验\Project\RTC_Test\designer\新建文件夹 (3)\RTC_Test_Top.pdb (125440, 2007-10-11)
RTC实验\Project\RTC_Test\designer\新建文件夹 (3)\说明.txt (87, 2007-10-11)
RTC实验\Project\RTC_Test\designer\新建文件夹 (4)\RTC_Test_Top.pdb (125440, 2007-10-11)
RTC实验\Project\RTC_Test\designer\新建文件夹 (4)\说明.txt (116, 2007-10-11)
RTC实验\Project\RTC_Test\hdl\hdlsynchk.tcl (123, 2007-12-11)
RTC实验\Project\RTC_Test\hdl\RTC_Test_Top.v (3820, 2007-10-11)
RTC实验\Project\RTC_Test\RTC_Test.prj (13997, 2007-12-17)
RTC实验\Project\RTC_Test\simulation\Analog_RTC_acm_ram_R0C0.mem (5120, 2007-12-11)
RTC实验\Project\RTC_Test\simulation\Analog_RTC_acm_rtc_ram_R0C0.mem (5120, 2007-12-11)
RTC实验\Project\RTC_Test\simulation\Analog_RTC_assc_ram_R0C0.mem (5632, 2007-12-11)
RTC实验\Project\RTC_Test\simulation\Analog_RTC_smev_ram_R0C0.mem (704, 2007-12-11)
RTC实验\Project\RTC_Test\simulation\Analog_RTC_smtr_ram_R0C0.mem (704, 2007-12-11)
RTC实验\Project\RTC_Test\simulation\FlashMem_RTC.mem (3848, 2007-12-11)
RTC实验\Project\RTC_Test\simulation\meminit.dat (2816, 2007-10-11)
RTC实验\Project\RTC_Test\simulation\modelsim.ini (248, 2007-12-17)
RTC实验\Project\RTC_Test\simulation\modelsim.ini.sav (246, 2007-12-17)
RTC实验\Project\RTC_Test\smartgen\Analog_RTC\Analog_RTC.cfg (1253, 2007-08-26)
RTC实验\Project\RTC_Test\smartgen\Analog_RTC\Analog_RTC.cxf (8778, 2007-08-26)
RTC实验\Project\RTC_Test\smartgen\Analog_RTC\Analog_RTC.gen (188, 2007-08-26)
... ...
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