viterbi_decoder
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：1450KB
下载次数：72
上传日期：2010-10-07 10:22:54
上 传 者：
20040502
说明： Viterbi译码的Verilog实现，（2,1,2）的，完整的工程文件，可以直接使用
(Verilog realization of Viterbi decoding, (2,1,2), complete engineering documents, can be used directly)
文件列表:
viterbi_decoder\src\BMG.v.bak (703, 2009-11-05)
viterbi_decoder\src\BMG.v (704, 2009-11-05)
viterbi_decoder\src\ACS.v.bak (1384, 2009-11-05)
viterbi_decoder\src\ACS.v (1319, 2009-11-05)
viterbi_decoder\src\m_gen.v.bak (238, 2009-11-05)
viterbi_decoder\src\m_gen.v (238, 2009-11-05)
viterbi_decoder\src\ACSU.v.bak (422, 2009-11-05)
viterbi_decoder\src\ACSU.v (422, 2009-11-05)
viterbi_decoder\src\MLD.v.bak (2815, 2009-11-06)
viterbi_decoder\src\MLD.v (2815, 2009-11-06)
viterbi_decoder\src\conv_code.v.bak (360, 2009-11-06)
viterbi_decoder\src\conv_code.v (362, 2009-12-23)
viterbi_decoder\src\test_viterbi.v.bak (101541, 2009-12-23)
viterbi_decoder\src\viterbi_decoder.v.bak (3135, 2009-12-23)
viterbi_decoder\src\test_viterbi.v (101541, 2009-12-23)
viterbi_decoder\src\viterbi_decoder.v (3290, 2010-01-15)
viterbi_decoder\output\viterbi_decoder.map.summary (475, 2009-12-23)
viterbi_decoder\output\viterbi_decoder.done (26, 2009-12-23)
viterbi_decoder\output\viterbi_decoder.pin (27428, 2009-12-23)
viterbi_decoder\output\viterbi_decoder.fit.smsg (513, 2009-12-23)
viterbi_decoder\output\viterbi_decoder.fit.summary (612, 2009-12-23)
viterbi_decoder\output\viterbi_decoder.sof (151050, 2009-12-23)
viterbi_decoder\output\viterbi_decoder.pof (524474, 2009-12-23)
viterbi_decoder\output\viterbi_decoder.rbf (52105, 2009-12-23)
viterbi_decoder\output\viterbi_decoder.tan.summary (1438, 2009-12-23)
viterbi_decoder\output\viterbi_decoder.map.rpt (24735, 2009-12-23)
viterbi_decoder\output\viterbi_decoder.fit.rpt (128705, 2009-12-23)
viterbi_decoder\output\viterbi_decoder.asm.rpt (8370, 2009-12-23)
viterbi_decoder\output\viterbi_decoder.tan.rpt (78628, 2009-12-23)
viterbi_decoder\output\viterbi_decoder.eda.rpt (5340, 2009-12-23)
viterbi_decoder\output\viterbi_decoder.flow.rpt (8600, 2009-12-23)
viterbi_decoder\sim\work\_info (1436, 2009-12-23)
viterbi_decoder\sim\work\@a@c@s@u\_primary.vhd (583, 2009-11-06)
viterbi_decoder\sim\work\@a@c@s@u\verilog.asm (6957, 2009-11-06)
viterbi_decoder\sim\work\@a@c@s@u\_primary.dat (515, 2009-11-06)
viterbi_decoder\sim\work\@b@m@g\_primary.vhd (640, 2009-11-06)
viterbi_decoder\sim\work\@b@m@g\verilog.asm (9500, 2009-11-06)
viterbi_decoder\sim\work\@b@m@g\_primary.dat (809, 2009-11-06)
viterbi_decoder\sim\work\@m@l@d\_primary.vhd (1196, 2009-11-06)
viterbi_decoder\sim\work\@m@l@d\verilog.asm (18619, 2009-11-06)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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