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基于FPGA_SOPC设计的简单串口程序\de2.1\.sopc_builder\install.ptf (10918, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\cpu_0.v (309882, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\cpu_0_ic_tag_ram.mif (1497, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\cpu_0_jtag_debug_module.v (12372, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\cpu_0_jtag_debug_module_wrapper.v (9896, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\cpu_0_mult_cell.v (6123, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\cpu_0_ociram_default_contents.mif (5878, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\cpu_0_rf_ram_a.mif (600, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\cpu_0_rf_ram_b.mif (600, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\cpu_0_test_bench.v (36915, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\altsyncram_4be1.tdf (39940, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\altsyncram_5be1.tdf (39940, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\altsyncram_c572.tdf (45629, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\altsyncram_cub1.tdf (2732, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\altsyncram_dtb1.tdf (54415, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\altsyncram_e502.tdf (44915, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\altsyncram_k1l1.tdf (40707, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\altsyncram_vke1.tdf (17776, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\decode_1oa.tdf (1506, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\decode_aoi.tdf (3471, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\ded_mult_2o81.tdf (3205, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\dffpipe_93c.tdf (1313, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\mult_add_4cr2.tdf (3036, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\mult_add_6cr2.tdf (3025, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\mux_ujb.tdf (6077, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\try.(0).cnf.cdb (677, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\try.(0).cnf.hdb (522, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\try.(1).cnf.cdb (13642, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\try.(1).cnf.hdb (4645, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\try.(10).cnf.cdb (3403, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\try.(10).cnf.hdb (977, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\try.(11).cnf.cdb (1796, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\try.(11).cnf.hdb (749, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\try.(12).cnf.cdb (1589, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\try.(12).cnf.hdb (727, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\try.(13).cnf.cdb (2004, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\try.(13).cnf.hdb (762, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\try.(14).cnf.cdb (2185, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\try.(14).cnf.hdb (926, 2009-05-10)
基于FPGA_SOPC设计的简单串口程序\de2.1\db\try.(15).cnf.cdb (2148, 2009-05-10)
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Readme - Hello World Software Example DESCRIPTION: Simple program that prints "Hello from Nios II" REQUIREMENTS: This example will run on the following Nios II designs, targeting the Nios Stratix & Cyclone development boards: - Standard - Full Featured - Fast - Low Cost The memory footprint of this hosted application is ~69 kbytes by default using the standard reference deisgn. For a reduced footprint version of this template, and an explanation of how to reduce the memory footprint for a given application, see the "small_hello_world" template. PERIPHERALS USED: This example exercises the following peripherals: - STDOUT device (UART or JTAG UART) SOFTWARE SOURCE FILES: This example includes the following software source files: - hello_world.c: Everyone needs a Hello World program, right? BOARD/HOST REQUIREMENTS: This example requires only a JTAG connection with a Nios Development board. If the host communication settings are changed from JTAG UART (default) to use a conventional UART, a serial cable between board DB-9 connector and the host is required.

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