verilogiic1121
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：136KB
下载次数：12
上传日期：2010-10-11 20:43:19
上 传 者：
shli9
说明： 代码中分了两个模块，iic_com模块除了执行和IIC通信有关的代码设计外，还有案件检测部分；而led_seg7模块只是驱动数码管显示从EEPROM指定地址读出的数据。
(Code carved the two modules, iic_com IIC communication module in addition to the implementation and design of the code, there are some cases of detection and led_seg7 module is driven digital display read out the specified address from the EEPROM data.)
文件列表:
verilogiic1121\db\add_sub_klh.tdf (3217, 2010-08-30)
verilogiic1121\db\iic_top.(0).cnf.cdb (1899, 2010-08-30)
verilogiic1121\db\iic_top.(0).cnf.hdb (1026, 2010-08-30)
verilogiic1121\db\iic_top.cbx.xml (183, 2010-08-30)
verilogiic1121\db\iic_top.cmp.rdb (4140, 2010-08-30)
verilogiic1121\db\iic_top.db_info (137, 2010-08-29)
verilogiic1121\db\iic_top.eco.cdb (161, 2010-08-30)
verilogiic1121\db\iic_top.eds_overflow (5, 2010-08-30)
verilogiic1121\db\iic_top.fnsim.cdb (2504, 2010-08-30)
verilogiic1121\db\iic_top.fnsim.hdb (13546, 2010-08-30)
verilogiic1121\db\iic_top.fnsim.qmsg (8649, 2010-08-30)
verilogiic1121\db\iic_top.hier_info (583, 2010-08-30)
verilogiic1121\db\iic_top.hif (744, 2010-08-30)
verilogiic1121\db\iic_top.lpc.html (430, 2010-08-30)
verilogiic1121\db\iic_top.lpc.rdb (385, 2010-08-30)
verilogiic1121\db\iic_top.lpc.txt (1060, 2010-08-30)
verilogiic1121\db\iic_top.map.cdb (2315, 2010-08-30)
verilogiic1121\db\iic_top.map.hdb (7392, 2010-08-30)
verilogiic1121\db\iic_top.map.logdb (4, 2010-08-30)
verilogiic1121\db\iic_top.map.qmsg (5403, 2010-08-30)
verilogiic1121\db\iic_top.pre_map.cdb (1854, 2010-08-30)
verilogiic1121\db\iic_top.pre_map.hdb (7407, 2010-08-30)
verilogiic1121\db\iic_top.rtlv.hdb (7404, 2010-08-30)
verilogiic1121\db\iic_top.rtlv_sg.cdb (1764, 2010-08-30)
verilogiic1121\db\iic_top.rtlv_sg_swap.cdb (178, 2010-08-30)
verilogiic1121\db\iic_top.sgdiff.cdb (1840, 2010-08-30)
verilogiic1121\db\iic_top.sgdiff.hdb (7586, 2010-08-30)
verilogiic1121\db\iic_top.sim.cvwf (842, 2010-08-30)
verilogiic1121\db\iic_top.sim.hdb (3104, 2010-08-30)
verilogiic1121\db\iic_top.sim.qmsg (4292, 2010-08-30)
verilogiic1121\db\iic_top.sim.rdb (3529, 2010-08-30)
verilogiic1121\db\iic_top.simfam (10, 2010-08-30)
verilogiic1121\db\iic_top.sim_ori.vwf (6582, 2010-08-30)
verilogiic1121\db\iic_top.sld_design_entry.sci (154, 2010-08-30)
verilogiic1121\db\iic_top.sld_design_entry_dsc.sci (154, 2010-08-30)
verilogiic1121\db\iic_top.syn_hier_info (0, 2010-08-30)
verilogiic1121\db\iic_top.tis_db_list.ddb (174, 2010-08-30)
verilogiic1121\db\iic_top.tmw_info (67, 2010-08-30)
verilogiic1121\db\prev_cmp_iic_top.map.qmsg (6457, 2010-08-30)
verilogiic1121\db\prev_cmp_iic_top.qmsg (8649, 2010-08-30)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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