GPS
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：13069KB
下载次数：91
上传日期：2010-10-12 21:17:05
上 传 者：
zgzhaobo
说明： 基于SOPC的GPS设计，全部源码，对于开发GPS有较大帮助~
(The GPS-based SOPC design, all the source code, greater help for the development of GPS)
文件列表:
GPS\FrameBufferFifo.v (7110, 2008-03-17)
GPS\GPS.asm.rpt (6817, 2008-10-16)
GPS\GPS.done (26, 2008-10-16)
GPS\GPS.fit.rpt (635735, 2008-10-16)
GPS\GPS.fit.smsg (70467, 2008-10-16)
GPS\GPS.fit.summary (610, 2008-10-16)
GPS\GPS.flow.rpt (4922, 2008-10-16)
GPS\GPS.jdi (31946, 2008-10-16)
GPS\GPS.map.rpt (617512, 2008-10-16)
GPS\GPS.map.summary (464, 2008-10-16)
GPS\GPS.pin (57478, 2008-10-16)
GPS\GPS.pof (2097338, 2008-10-16)
GPS\GPS.qpf (906, 2008-10-15)
GPS\GPS.qsf (25531, 2008-10-15)
GPS\GPS.qsf.bak (1733, 2008-10-15)
GPS\GPS.qws (198, 2008-10-17)
GPS\GPS.sof (475729, 2008-10-16)
GPS\GPS.tan.rpt (963210, 2008-10-16)
GPS\GPS.tan.summary (4642, 2008-10-16)
GPS\GPS.v (9520, 2008-10-15)
GPS\LCD_INTERFACE.v (8796, 2008-10-16)
GPS\SDRAM_PLL.v (16744, 2008-03-25)
GPS\SRAM_16Bit_512K.v (809, 2008-10-16)
GPS\cpu_0.v (391369, 2008-10-16)
GPS\cpu_0_bht_ram.mif (2392, 2008-10-16)
GPS\cpu_0_dc_tag_ram.mif (6745, 2008-10-16)
GPS\cpu_0_ic_tag_ram.mif (1753, 2008-10-16)
GPS\cpu_0_jtag_debug_module.v (12372, 2008-10-16)
GPS\cpu_0_jtag_debug_module_wrapper.v (9896, 2008-10-16)
GPS\cpu_0_mult_cell.v (6123, 2008-10-16)
GPS\cpu_0_ociram_default_contents.mif (5878, 2008-10-16)
GPS\cpu_0_rf_ram_a.mif (600, 2008-10-16)
GPS\cpu_0_rf_ram_b.mif (600, 2008-10-16)
GPS\cpu_0_test_bench.v (38337, 2008-10-16)
GPS\cursor.hex (6763, 2008-06-17)
GPS\cursor.v (9856, 2008-06-17)
GPS\epcs_controller.v (17859, 2008-10-16)
GPS\epcs_controller_boot_rom.hex (2588, 2008-10-16)
GPS\gps_system.bsf (7914, 2008-10-15)
GPS\gps_system.ptf (105696, 2008-10-16)
... ...
Readme - Hello World Software Example
DESCRIPTION:
Simple program that prints "Hello from Nios II"
REQUIREMENTS:
This example will run on the following Nios II designs, targeting the Nios
Stratix & Cyclone development boards:
- Standard
- Full Featured
- Fast
- Low Cost
The memory footprint of this hosted application is ~69 kbytes by default
using the standard reference deisgn.
For a reduced footprint version of this template, and an explanation of how
to reduce the memory footprint for a given application, see the
"small_hello_world" template.
PERIPHERALS USED:
This example exercises the following peripherals:
- STDOUT device (UART or JTAG UART)
SOFTWARE SOURCE FILES:
This example includes the following software source files:
- hello_world.c: Everyone needs a Hello World program, right?
BOARD/HOST REQUIREMENTS:
This example requires only a JTAG connection with a Nios Development board. If
the host communication settings are changed from JTAG UART (default) to use a
conventional UART, a serial cable between board DB-9 connector and the host is
required.
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