uart_EP3C16_FIFO
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：6598KB
下载次数：555
上传日期：2010-11-04 20:02:24
上 传 者：
515666524
说明： Verilog编写的串口RS232收发字符串程序,使用FIFO作为数据缓冲区,有效收发字符串长度为256字节,解决了利用串口调试工具与FPGA通讯只能收发单字节的问题.
(Programs for uart/RS232, it can receive and transmit strings.)
文件列表:
uart_EP3C16_FIFO\clkdiv.bsf (1579, 2010-10-23)
uart_EP3C16_FIFO\clkdiv.v (422, 2010-10-23)
uart_EP3C16_FIFO\data_fifo2.bsf (3216, 2010-11-03)
uart_EP3C16_FIFO\data_fifo2.qip (374, 2010-11-03)
uart_EP3C16_FIFO\data_fifo2.v (6808, 2010-11-03)
uart_EP3C16_FIFO\data_fifo2_bb.v (5792, 2010-11-03)
uart_EP3C16_FIFO\data_fifo2_wave0.jpg (84865, 2010-11-03)
uart_EP3C16_FIFO\data_fifo2_waveforms.html (782, 2010-11-03)
uart_EP3C16_FIFO\db\altsyncram_anu.tdf (13058, 2010-10-26)
uart_EP3C16_FIFO\db\altsyncram_knu.tdf (13157, 2010-10-31)
uart_EP3C16_FIFO\db\altsyncram_lf31.tdf (13295, 2010-11-03)
uart_EP3C16_FIFO\db\alt_synch_pipe_06d.tdf (2139, 2010-10-30)
uart_EP3C16_FIFO\db\alt_synch_pipe_16d.tdf (2139, 2010-10-30)
uart_EP3C16_FIFO\db\alt_synch_pipe_36d.tdf (2140, 2010-10-31)
uart_EP3C16_FIFO\db\alt_synch_pipe_46d.tdf (2140, 2010-10-31)
uart_EP3C16_FIFO\db\alt_synch_pipe_ikd.tdf (2191, 2010-11-03)
uart_EP3C16_FIFO\db\alt_synch_pipe_jkd.tdf (2191, 2010-11-03)
uart_EP3C16_FIFO\db\alt_synch_pipe_u5d.tdf (2139, 2010-10-26)
uart_EP3C16_FIFO\db\alt_synch_pipe_v5d.tdf (2139, 2010-10-26)
uart_EP3C16_FIFO\db\a_graycounter_84c.tdf (2853, 2010-10-26)
uart_EP3C16_FIFO\db\a_graycounter_94c.tdf (3088, 2010-10-26)
uart_EP3C16_FIFO\db\a_graycounter_d4c.tdf (3570, 2010-10-31)
uart_EP3C16_FIFO\db\a_graycounter_dm6.tdf (3002, 2010-10-26)
uart_EP3C16_FIFO\db\a_graycounter_e4c.tdf (3930, 2010-10-31)
uart_EP3C16_FIFO\db\a_graycounter_fic.tdf (3736, 2010-11-03)
uart_EP3C16_FIFO\db\a_graycounter_gic.tdf (4049, 2010-11-03)
uart_EP3C16_FIFO\db\a_graycounter_im6.tdf (3844, 2010-10-31)
uart_EP3C16_FIFO\db\a_graycounter_k47.tdf (3963, 2010-11-03)
uart_EP3C16_FIFO\db\cmpr_156.tdf (1760, 2010-10-26)
uart_EP3C16_FIFO\db\cmpr_656.tdf (2206, 2010-10-31)
uart_EP3C16_FIFO\db\dcfifo_djg1.tdf (5520, 2010-11-03)
uart_EP3C16_FIFO\db\dcfifo_gtd1.tdf (5201, 2010-10-30)
uart_EP3C16_FIFO\db\dcfifo_hcf1.tdf (5318, 2010-10-26)
uart_EP3C16_FIFO\db\dcfifo_v0e1.tdf (5218, 2010-10-31)
uart_EP3C16_FIFO\db\decode_rvf.tdf (8882, 2010-10-24)
uart_EP3C16_FIFO\db\dffpipe_0v8.tdf (1740, 2010-10-30)
uart_EP3C16_FIFO\db\dffpipe_2v8.tdf (1734, 2010-10-31)
uart_EP3C16_FIFO\db\dffpipe_3v8.tdf (1748, 2010-10-31)
uart_EP3C16_FIFO\db\dffpipe_hd9.tdf (1726, 2010-11-03)
uart_EP3C16_FIFO\db\dffpipe_id9.tdf (1740, 2010-11-03)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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