A_digital_WaveformGenerator_and_Oscilloscope_based

所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:3337KB
下载次数:730
上传日期:2010-11-16 10:22:49
上 传 者lynn2317
说明:  一种基于BASYS开发板(Xilinx Spartan-3E FPGA)的波形发生器和示波器的设计,可以产生多种可调波形,并实时显示在电脑显示器或者投影仪上。波形发生器采用基于ROM的数字控制振荡器(NCO)实现,示波器采用VGA接口实时显示。
(A kind of digital WaveGenerator and Oscilloscope based on tne BASYS experiment board which has a Xilinx Spartan-3E FPGA on it.This design can make adjustable sine,triangle and rectangle waveform.It also can show the waveform real time on a computer dispaly or a projecting apparatus via a VGA cable.The emphases of this project is to realize real-time VGA interface in a FPGA.)

文件列表:
基于BASYS开发板的波形发生器和示波器设计\20101109_基于BASYS开发板的信号发生器和示波器设计.pdf (218489, 2010-11-16)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\.lso (6, 2010-11-12)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\DDS.sym (3420, 2010-11-10)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\DDS.vhd (2712, 2010-11-03)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\DDS_summary.html (3305, 2010-11-04)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\DDS_vhdl.prj (326, 2010-11-10)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\display.cmd_log (2368, 2010-11-10)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\display.jhd (354, 2010-11-12)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\display.pdf (13579, 2010-11-12)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\display.sch (16717, 2010-11-12)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\display.schbak (14856, 2010-11-12)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\display.schcmd (46, 2010-11-11)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\display.schlog (0, 2010-11-12)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\display.sym (2313, 2010-11-12)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\display.vhf (6151, 2010-11-12)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\divide_frequency.sym (852, 2010-11-05)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\divide_frequency.vhd (1331, 2010-11-05)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\divide_frequency_vhdl.prj (94, 2010-11-05)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\HVCNT.vhd (1520, 2010-11-04)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\IMG2coe8\IMG2coe8.m (1410, 2010-11-03)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\IMG2coe8\logo.coe (12555, 2010-11-05)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\IMG2coe8\logo.jpg (2784, 2010-11-05)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\IMG2coe8.m (1410, 2010-11-03)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\ipcore_dir\blk_mem_gen_ds512.pdf (3144532, 2010-11-05)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\ipcore_dir\Dual_RAM_512x8.asy (702, 2010-11-04)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\ipcore_dir\Dual_RAM_512x8.gise (2370, 2010-11-12)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\ipcore_dir\Dual_RAM_512x8.ise (11131, 2010-11-12)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\ipcore_dir\Dual_RAM_512x8.ncf (0, 2010-11-10)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\ipcore_dir\Dual_RAM_512x8.ngc (16563, 2010-11-04)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\ipcore_dir\Dual_RAM_512x8.sym (2019, 2010-11-04)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\ipcore_dir\Dual_RAM_512x8.v (4834, 2010-11-04)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\ipcore_dir\Dual_RAM_512x8.veo (3130, 2010-11-04)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\ipcore_dir\Dual_RAM_512x8.vhd (5395, 2010-11-04)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\ipcore_dir\Dual_RAM_512x8.vho (3668, 2010-11-04)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\ipcore_dir\Dual_RAM_512x8.xco (2458, 2010-11-04)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\ipcore_dir\Dual_RAM_512x8.xise (2991, 2010-11-04)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\ipcore_dir\Dual_RAM_512x8_flist.txt (316, 2010-11-04)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\ipcore_dir\Dual_RAM_512x8_xdb\tmp\ise\version (138, 2010-11-12)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\ipcore_dir\Dual_RAM_512x8_xdb\tmp\ise\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject (251, 2010-11-12)
基于BASYS开发板的波形发生器和示波器设计\Oscilloscope\ipcore_dir\Dual_RAM_512x8_xdb\tmp\ise\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject_StrTbl (91, 2010-11-12)
... ...

The following files were generated for 'ROM_8192x8' in directory C:\Documents and Settings\Xilinx\BasysRevEDemo\Oscilloscope\ipcore_dir\ ROM_8192x8.asy: Graphical symbol information file. Used by the ISE tools and some third party tools to create a symbol representing the core. ROM_8192x8.gise: ISE Project Navigator support file. This is a generated file and should not be edited directly. ROM_8192x8.ise: ISE Project Navigator support file. This is a generated file and should not be edited directly. ROM_8192x8.mif: Memory Initialization File which is automatically generated by the CORE Generator System for some modules when a simulation flow is specified. A MIF data file is used to support HDL functional simulation of modules which use arrays of values. ROM_8192x8.ngc: Binary Xilinx implementation netlist file containing the information required to implement the module in a Xilinx (R) FPGA. ROM_8192x8.sym: Please see the core data sheet. ROM_8192x8.v: Verilog wrapper file provided to support functional simulation. This file contains simulation model customization data that is passed to a parameterized simulation model for the core. ROM_8192x8.veo: VEO template file containing code that can be used as a model for instantiating a CORE Generator module in a Verilog design. ROM_8192x8.vhd: VHDL wrapper file provided to support functional simulation. This file contains simulation model customization data that is passed to a parameterized simulation model for the core. ROM_8192x8.vho: VHO template file containing code that can be used as a model for instantiating a CORE Generator module in a VHDL design. ROM_8192x8.xco: CORE Generator input file containing the parameters used to regenerate a core. ROM_8192x8.xise: ISE Project Navigator support file. This is a generated file and should not be edited directly. ROM_8192x8_flist.txt: Text file listing all of the output files produced when a customized core was generated in the CORE Generator. ROM_8192x8_readme.txt: Text file indicating the files generated and how they are used. ROM_8192x8_xmdf.tcl: ISE Project Navigator interface file. ISE uses this file to determine how the files output by CORE Generator for the core can be integrated into your ISE project. Please see the Xilinx CORE Generator online help for further details on generated files and how to use them.

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