pipelined_fft_64
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：97KB
下载次数：65
上传日期：2010-11-27 21:40:31
上 传 者：
chyg123
说明： 利用IP Core编写的Verilog程序，实现FFT变换，希望对大家有帮助。
(Written using Verilog IP Core procedures to achieve FFT transformation, we want to help.)
文件列表:
pipelined_fft_64\trunk\BENCH\sinerom64_gen.pl (4700, 2010-11-27)
pipelined_fft_64\trunk\BENCH\sin_tst_rom.v (4240, 2010-11-27)
pipelined_fft_64\trunk\BENCH\USFFT64_2B_TB.v (5663, 2010-11-27)
pipelined_fft_64\trunk\DOC\fft64_um.pdf (100878, 2010-11-27)
pipelined_fft_64\trunk\RTL\bufram64c1.v (4904, 2010-11-27)
pipelined_fft_64\trunk\RTL\cnorm.v (4783, 2010-11-27)
pipelined_fft_64\trunk\RTL\fft64_config.inc (3473, 2010-11-27)
pipelined_fft_64\trunk\RTL\fft8.v (10812, 2010-11-27)
pipelined_fft_64\trunk\RTL\mpu707.v (4175, 2010-11-27)
pipelined_fft_64\trunk\RTL\ram2x64c_1.v (5780, 2010-11-27)
pipelined_fft_64\trunk\RTL\ram64.v (3907, 2010-11-27)
pipelined_fft_64\trunk\RTL\rotator64_v.v (5132, 2010-11-27)
pipelined_fft_64\trunk\RTL\usfft64_2b.v (7725, 2010-11-27)
pipelined_fft_64\trunk\RTL\WROM64.v (8623, 2010-11-27)
pipelined_fft_64\trunk\BENCH (0, 2010-11-27)
pipelined_fft_64\trunk\DOC (0, 2010-11-27)
pipelined_fft_64\trunk\RTL (0, 2010-11-27)
pipelined_fft_64\branches (0, 2010-11-27)
pipelined_fft_64\tags (0, 2010-11-27)
pipelined_fft_64\trunk (0, 2010-11-27)
pipelined_fft_64 (0, 2010-11-27)
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