cpu
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：571KB
下载次数：28
上传日期：2010-12-13 21:11:32
上 传 者：
m42372
说明： 8位CISC模型计算机设计，包括加减法存储输出的运算
(8-bit CISC model of computer design, including the addition and subtraction operations stored output)
文件列表:
cpu\cmp_state.ini (2, 2008-11-08)
cpu\cpu.asm.rpt (7199, 2008-11-08)
cpu\cpu.bdf (65830, 2008-11-08)
cpu\cpu.cdf (295, 2007-08-16)
cpu\cpu.done (26, 2008-11-08)
cpu\cpu.fit.eqn (735629, 2008-11-08)
cpu\cpu.fit.rpt (313573, 2008-11-08)
cpu\cpu.fit.summary (438, 2008-11-08)
cpu\cpu.fld (45, 2007-08-16)
cpu\cpu.flow.rpt (3605, 2008-11-08)
cpu\cpu.map.eqn (695037, 2008-11-08)
cpu\cpu.map.rpt (293950, 2008-11-08)
cpu\cpu.map.summary (376, 2008-11-08)
cpu\cpu.pin (30155, 2008-11-08)
cpu\cpu.pof (524474, 2008-11-08)
cpu\cpu.qpf (939, 2006-04-12)
cpu\cpu.qsf (40583, 2010-11-11)
cpu\cpu.qws (90, 2010-11-11)
cpu\cpu.sim.rpt (6319, 2008-11-08)
cpu\cpu.sof (140544, 2008-11-08)
cpu\cpu.tan.rpt (604630, 2008-11-08)
cpu\cpu.tan.summary (3048, 2008-11-08)
cpu\cpu_assignment_defaults.qdf (34957, 2006-04-17)
cpu\db\add_sub_4rh.tdf (2574, 2008-11-08)
cpu\db\add_sub_5rh.tdf (2781, 2008-11-08)
cpu\db\add_sub_9rh.tdf (3610, 2008-11-08)
cpu\db\add_sub_knh.tdf (3401, 2008-11-08)
cpu\db\add_sub_lnh.tdf (3609, 2008-11-08)
cpu\db\altsyncram_3em.tdf (15777, 2008-11-08)
cpu\db\altsyncram_6jo2.tdf (712987, 2007-08-17)
cpu\db\altsyncram_bi92.tdf (147055, 2007-08-16)
cpu\db\altsyncram_fi92.tdf (149389, 2007-08-16)
cpu\db\altsyncram_fl92.tdf (166846, 2007-08-17)
cpu\db\altsyncram_ji92.tdf (141220, 2007-08-16)
cpu\db\altsyncram_li92.tdf (152890, 2007-08-16)
cpu\db\altsyncram_o001.tdf (9701, 2008-11-08)
cpu\db\altsyncram_pi92.tdf (176230, 2007-08-16)
cpu\db\altsyncram_qi92.tdf (165727, 2007-08-17)
cpu\db\altsyncram_ri92.tdf (176230, 2007-08-16)
cpu\db\altsyncram_ti92.tdf (165728, 2008-11-08)
... ...
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