文件列表:

System Verilog (0, 2010-03-30)
System Verilog\A Practical Guide for SystemVerilog Assertions (0, 2010-03-30)
System Verilog\A Practical Guide for SystemVerilog Assertions\1.pdf (167945, 2008-03-17)
System Verilog\A Practical Guide for SystemVerilog Assertions\2.pdf (2823793, 2008-03-17)
System Verilog\A Practical Guide for SystemVerilog Assertions\3.pdf (1595887, 2008-03-17)
System Verilog\A Practical Guide for SystemVerilog Assertions\4.pdf (907593, 2008-03-17)
System Verilog\A Practical Guide for SystemVerilog Assertions\5.pdf (857208, 2008-03-17)
System Verilog\A Practical Guide for SystemVerilog Assertions\6.pdf (1476925, 2008-03-17)
System Verilog\A Practical Guide for SystemVerilog Assertions\7.pdf (1973223, 2008-03-17)
System Verilog\A Practical Guide for SystemVerilog Assertions\8.pdf (1291290, 2008-03-17)
System Verilog\A Practical Guide for SystemVerilog Assertions\A Practical Guide for System Verilog Assertions.pdf (11852791, 2009-10-17)
System Verilog\A Practical Guide for SystemVerilog Assertions\back-matter.pdf (92817, 2008-03-17)
System Verilog\A Practical Guide for SystemVerilog Assertions\front-matter.pdf (616921, 2008-03-17)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘 (0, 2010-03-30)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1 (0, 2010-03-30)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\andor (0, 2010-03-30)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\andor\andor.v (1794, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\andor\compile (62, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\andor\compile.log (1274, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\andor\run (39, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\andor\run.log (3305, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\basic (0, 2010-03-30)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\basic\basic.v (3574, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\basic\compile (58, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\basic\compile.log (1357, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\basic\run (39, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\basic\run.log (21675, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\basic\vcs.key (5, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\basic_time (0, 2010-03-30)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\basic_time\basic_time.v (1751, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\basic_time\compile (37, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\basic_time\compile.log (1352, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\basic_time\run (16, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\basic_time\run.log (3575, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\cond (0, 2010-03-30)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\cond\compile (58, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\cond\compile.log (1270, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\cond\cond.v (2235, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\cond\run (39, 2006-05-26)
System Verilog\A Practical Guide for SystemVerilog Assertions\配书光盘\chapter1\cond\run.log (726, 2006-05-26)
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CD-ROM Disclaimer Copyright 2005, Springer. All Rights Reserved. This CD-ROM is distributed by Springer with ABSOLUTELY NO SUPPORT and NO WARRANTY from Springer. Use or reproduction of the information provided on this CD-ROM for commercial gain is strictly prohibited. Explicit permission is given for the reproduction and use of this information in an instructional setting provided proper reference is given to the original source. Authors and Springer shall not be liable for damage in connection with, or arising out of, the furnishing, performance or use of this CD-ROM. This is the CD image directory for the various examples in the book. All the examples can be run using VCS2005.06/VCS7.2 on LINUX/SOLARIS platforms All the directories will have the following files: compile - script to compile the verilog source files run - script to run the compiled executable .sva - assertions source file .v - verilog source file If there are no .sva files in any directory then the assertions might have been inlined in the verilog source code. In case there are any special switches or `defines for certain examples in the chapters indivijual README files are in those directories The verilog source files for some chapter uses the system verilog 3.0 constructs Files Generated by the the scripts ================================== compile.log - log file that is generated by the compile script during compiling run.log - log file that is being generated by the run script during run time. vcdplus.vpd - dump file geneated by vcs. to open the debugger type "vcs -RPP" at the command line

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