XAPP146_VoltMeter_ver1.1
所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:186KB
下载次数:8
上传日期:2011-01-07 23:07:11
上 传 者:
joneychen12
说明: XAPP146 VOLTMETER VHDL Code
文件列表:
Source\PocketC\8chDVM.c (2450, 2001-06-11)
Source\PocketC\small1.bmp (1222, 2001-03-19)
Source\PocketC\Thumbs.db (4096, 2011-01-06)
Source\PocketC\Xilinx.bmp (190, 2000-07-06)
Source\VHDL\automake.log (1518, 2002-01-29)
Source\VHDL\last_used.ucf (5310, 2002-01-29)
Source\VHDL\multi_dvm.jhd (82, 2002-01-29)
Source\VHDL\multi_dvm.vhd (37094, 2001-06-13)
Source\VHDL\multi_dvm_tb.jhd (49, 2002-01-29)
Source\VHDL\multi_dvm_tb.vhd (3765, 2001-06-12)
Source\VHDL\shift16.jhd (16, 2002-01-29)
Source\VHDL\shift16.vhd (1758, 2001-06-12)
Source\VHDL\shift8.jhd (15, 2002-01-29)
Source\VHDL\shift8.vhd (1849, 2001-06-12)
Source\VHDL\top_level.ann (98275, 2002-01-29)
Source\VHDL\top_level.baf (1324, 2002-01-29)
Source\VHDL\top_level.blx (66053, 2002-01-29)
Source\VHDL\top_level.cxt (277890, 2002-01-29)
Source\VHDL\top_level.jhd (42, 2002-01-29)
Source\VHDL\top_level.log (33, 2002-01-29)
Source\VHDL\top_level.mfd (146827, 2002-01-29)
Source\VHDL\top_level.paf (1324, 2002-01-29)
Source\VHDL\top_level.ph0 (192160, 2002-01-29)
Source\VHDL\top_level.ph1 (79657, 2002-01-29)
Source\VHDL\top_level.ph2 (79657, 2002-01-29)
Source\VHDL\top_level.prt (18003, 2002-01-29)
Source\VHDL\top_level.ucf (5310, 2002-01-29)
Source\VHDL\top_level.vhd (8605, 2001-06-12)
Source\VHDL\top_level_tb.jhd (45, 2002-01-29)
Source\VHDL\top_level_tb.udo (120, 2002-01-29)
Source\VHDL\top_level_tb.vhd (4751, 2002-01-29)
Source\VHDL\top_level_timesim.sdf (823167, 2002-01-29)
Source\VHDL\top_level_timesim.vhd (619596, 2002-01-29)
Source\VHDL\upcnt5.jhd (15, 2002-01-29)
Source\VHDL\upcnt5.vhd (1531, 2001-06-12)
Source\VHDL\vhdl.jid (73, 2002-01-29)
Source\VHDL\vhdl.npl (595, 2002-01-29)
Source\VHDL\__filesAllClean.fac (1381, 2002-01-29)
Source\VHDL\__projnav.log (1999, 2002-01-29)
8chDVM.prc (41525, 2001-06-11)
... ...
VoltMeter_ver1.1.zip
This zip file contains programming files and associated source code.
PROGRAMMING FILES:
-----------------
top_level.jed - JEDEC file used to program the CoolRunner CPLD located on the Insight
Springboard Development Board. Implements the 8 channel Digital
Voltmeter design discussed in Application Note XAPP146
8chDVM.prc - PalmOS Application that displays the voltages on all 8 channels
of the ADS7870 Data Aquisition System
SOURCE CODE:
-----------
VHDL Folder:
top_level.vhd -- Top level VHDL file
+ multi_dvm.vhd -- State machine implementation
+ shift16.vhd -- 16 bit shift register
+ shift8.vhd -- 8 bit shift register
+ upcnt5.vhd -- 5 bit up counter
top_level.ucf -- Xilinx "User Constraints File". Used by Xilinx WebPACK software
to assign pins
PocketC Folder:
8chDVM.pc -- PocketC Source File. Can be compiled with PocketC Desktop Edition
Xilinx.bmp -- Bitmap file for large icon
small.bmp -- Bitmap file for small
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