spi
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：1453KB
下载次数：73
上传日期：2011-01-15 11:27:16
上 传 者：
JIANSUN555
说明： SPI IP CORE Verilog quartusii
文件列表:
spi\spi\fifo4.v (4378, 2002-12-23)
spi\spi\simple_spi\simple_spi\bench\CVS\Entries (14, 2008-10-07)
spi\spi\simple_spi\simple_spi\bench\CVS\Repository (17, 2008-10-07)
spi\spi\simple_spi\simple_spi\bench\CVS\Root (13, 2008-10-07)
spi\spi\simple_spi\simple_spi\bench\verilog\CVS\Entries (150, 2008-10-07)
spi\spi\simple_spi\simple_spi\bench\verilog\CVS\Repository (25, 2008-10-07)
spi\spi\simple_spi\simple_spi\bench\verilog\CVS\Root (13, 2008-10-07)
spi\spi\simple_spi\simple_spi\bench\verilog\spi_slave_model.v (3883, 2004-02-29)
spi\spi\simple_spi\simple_spi\bench\verilog\tst_bench_top.v (6372, 2004-02-29)
spi\spi\simple_spi\simple_spi\bench\verilog\wb_master_model.v (5512, 2004-02-29)
spi\spi\simple_spi\simple_spi\CVS\Entries (42, 2008-10-07)
spi\spi\simple_spi\simple_spi\CVS\Repository (11, 2008-10-07)
spi\spi\simple_spi\simple_spi\CVS\Root (13, 2008-10-07)
spi\spi\simple_spi\simple_spi\doc\CVS\Entries (60, 2008-10-07)
spi\spi\simple_spi\simple_spi\doc\CVS\Repository (15, 2008-10-07)
spi\spi\simple_spi\simple_spi\doc\CVS\Root (13, 2008-10-07)
spi\spi\simple_spi\simple_spi\doc\simple_spi.pdf (55328, 2003-01-07)
spi\spi\simple_spi\simple_spi\doc\src\CVS\Entries (52, 2008-10-07)
spi\spi\simple_spi\simple_spi\doc\src\CVS\Repository (19, 2008-10-07)
spi\spi\simple_spi\simple_spi\doc\src\CVS\Root (13, 2008-10-07)
spi\spi\simple_spi\simple_spi\doc\src\simple_spi.doc (400896, 2003-01-07)
spi\spi\simple_spi\simple_spi\rtl\CVS\Entries (14, 2008-10-07)
spi\spi\simple_spi\simple_spi\rtl\CVS\Repository (15, 2008-10-07)
spi\spi\simple_spi\simple_spi\rtl\CVS\Root (13, 2008-10-07)
spi\spi\simple_spi\simple_spi\rtl\verilog\CVS\Entries (95, 2008-10-07)
spi\spi\simple_spi\simple_spi\rtl\verilog\CVS\Repository (23, 2008-10-07)
spi\spi\simple_spi\simple_spi\rtl\verilog\CVS\Root (13, 2008-10-07)
spi\spi\simple_spi\simple_spi\rtl\verilog\fifo4.v (4378, 2002-12-23)
spi\spi\simple_spi\simple_spi\rtl\verilog\simple_spi_top.v (10507, 2004-02-28)
spi\spi\simple_spi\simple_spi\sim\CVS\Entries (14, 2008-10-07)
spi\spi\simple_spi\simple_spi\sim\CVS\Repository (15, 2008-10-07)
spi\spi\simple_spi\simple_spi\sim\CVS\Root (13, 2008-10-07)
spi\spi\simple_spi\simple_spi\sim\rtl_sim\bin\CVS\Entries (43, 2008-10-07)
spi\spi\simple_spi\simple_spi\sim\rtl_sim\bin\CVS\Repository (27, 2008-10-07)
spi\spi\simple_spi\simple_spi\sim\rtl_sim\bin\CVS\Root (13, 2008-10-07)
spi\spi\simple_spi\simple_spi\sim\rtl_sim\bin\Makefile (3510, 2004-02-29)
spi\spi\simple_spi\simple_spi\sim\rtl_sim\CVS\Entries (20, 2008-10-07)
spi\spi\simple_spi\simple_spi\sim\rtl_sim\CVS\Repository (23, 2008-10-07)
spi\spi\simple_spi\simple_spi\sim\rtl_sim\CVS\Root (13, 2008-10-07)
spi\spi\simple_spi\simple_spi\sim\rtl_sim\run\CVS\Entries (239, 2008-10-07)
... ...
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