xapp205_fifo_ctl
所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:46KB
下载次数:8
上传日期:2011-01-19 09:30:34
上 传 者:
joneychen12
说明: XAPP205 Xilinx FIFO Controller VHDL code
文件列表:
xapp205_fifo_ctl\fifoctlr_ccmw1.v (11665, 2002-08-08)
xapp205_fifo_ctl\fifoctlr_ccmw1.vhd (12985, 2000-07-18)
xapp205_fifo_ctl\fifoctlr_ccmw2.v (11619, 2002-08-08)
xapp205_fifo_ctl\fifoctlr_ccmw2.vhd (13123, 2000-07-18)
xapp205_fifo_ctl\fifoctlr_icmw1.v (20184, 2002-08-08)
xapp205_fifo_ctl\fifoctlr_icmw1.vhd (24707, 2000-07-18)
xapp205_fifo_ctl\fifoctlr_icmw2.v (20267, 2002-08-08)
xapp205_fifo_ctl\fifoctlr_icmw2.vhd (24846, 2000-07-18)
xapp205_fifo_ctl\fifofaq (10470, 2002-08-08)
xapp205_fifo_ctl\tb_x205v_ccmw1.v (8108, 2000-07-18)
xapp205_fifo_ctl\tb_x205v_ccmw2.v (6838, 2000-07-18)
xapp205_fifo_ctl\tb_x205v_icmw1.v (9137, 2000-07-18)
xapp205_fifo_ctl\tb_x205v_icmw1b.v (9171, 2000-07-18)
xapp205_fifo_ctl\tb_x205v_icmw2.v (7824, 2000-07-18)
xapp205_fifo_ctl\tb_x205v_icmw2b.v (7681, 2000-07-18)
xapp205_fifo_ctl (0, 2011-01-18)
/******************************************************************************
**
** Disclaimer: LIMITED WARRANTY AND DISCLAMER. These designs are
** provided to you "as is". Xilinx and its licensors make and you
** receive no warranties or conditions, express, implied,
** statutory or otherwise, and Xilinx specifically disclaims any
** implied warranties of merchantability, non-infringement, or
** fitness for a particular purpose. Xilinx does not warrant that
** the functions contained in these designs will meet your
** requirements, or that the operation of these designs will be
** uninterrupted or error free, or that defects in the Designs
** will be corrected. Furthermore, Xilinx does not warrant or
** make any representations regarding use or the results of the
** use of the designs in terms of correctness, accuracy,
** reliability, or otherwise.
**
** LIMITATION OF LIABILITY. In no event will Xilinx or its
** licensors be liable for any loss of data, lost profits, cost
** or procurement of substitute goods or services, or for any
** special, incidental, consequential, or indirect damages
** arising from the use or operation of the designs or
** accompanying documentation, however caused and on any theory
** of liability. This limitation will apply even if Xilinx
** has been advised of the possibility of such damage. This
** limitation shall apply not-withstanding the failure of the
** essential purpose of any limited remedies herein.
**
** Copyright \251 2002 Xilinx, Inc.
** All rights reserved
**
******************************************************************************/
Date: 08/08/02
File Name: xapp205.zip
Contains: fifoctlr_ccmw1.v
fifoctlr_ccmw1.vhd
fifoctlr_ccmw2.v
fifoctlr_ccmw2.vhd
fifoctlr_icmw1.v
fifoctlr_icmw1.vhd
fifoctlr_icmw2.v
fifoctlr_icmw2.vhd
fifofaq
readme.txt
tb_x205v_ccmw1.v
tb_x205v_ccmw2.v
tb_x205v_icmw1.v
tb_x205v_icmw1b.v
tb_x205v_icmw2.v
tb_x205v_icmw2b.v
Description: Verilog files for XAPP205, Virtex Data-Width
Conversion FIFOs
Platform: all
Installation/Use: unzip
Who to Contact if you have problems?
http://www.xilinx.com/support/services/contact_info.htm
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