water
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：52KB
下载次数：1
上传日期：2015-03-23 09:20:25
上 传 者：
3773932
说明： 基于FPGA的流水灯程序设计，时钟晶振为48M
(Running water light program design based on FPGA, the clock crystals of 48 m)
文件列表:
water\cmp_state.ini (2, 2006-09-20)
water\db\led_water.db_info (137, 2014-09-15)
water\db\led_water.eco.cdb (161, 2014-09-15)
water\db\led_water.sld_design_entry.sci (200, 2014-09-15)
water\int_div.bsf (1778, 2006-07-06)
water\int_div.v (2285, 2006-07-04)
water\ledwater.bsf (1627, 2006-07-06)
water\ledwater.v (387, 2006-07-06)
water\led_water.asm.rpt (7889, 2006-09-20)
water\led_water.bdf (3509, 2006-07-06)
water\led_water.cdf (286, 2006-07-06)
water\led_water.done (26, 2006-09-20)
water\led_water.fit.eqn (21992, 2006-09-20)
water\led_water.fit.rpt (68623, 2006-09-20)
water\led_water.fit.summary (442, 2006-09-20)
water\led_water.flow.rpt (3659, 2006-09-20)
water\led_water.map.eqn (16057, 2006-09-20)
water\led_water.map.rpt (15972, 2006-09-20)
water\led_water.map.summary (379, 2006-09-20)
water\led_water.pin (30162, 2006-09-20)
water\led_water.pof (524474, 2006-09-20)
water\led_water.qpf (944, 2006-07-06)
water\led_water.qsf (3792, 2014-09-15)
water\led_water.qws (1250, 2014-09-15)
water\led_water.sof (281508, 2006-09-20)
water\led_water.tan.rpt (165332, 2006-09-20)
water\led_water.tan.summary (2074, 2006-09-20)
water\led_water_assignment_defaults.qdf (44025, 2011-11-07)
water\_desktop.ini (10, 2006-10-13)
water\db (0, 2015-03-23)
water (0, 2015-03-23)
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