LIP3001CORE_cpu
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：159KB
下载次数：13
上传日期：2011-02-14 09:13:42
上 传 者：
joneychen12
说明： CPU Verilog Module source code
文件列表:
project_2_impl_1\project_2_impl_1.psi (1433, 2007-05-17)
project_2_temp_1\analysis.args1.file (342, 2007-05-17)
project_2_temp_1\hdlAnalyze_sysverilogfile (99, 2007-05-17)
project_2_temp_1\hdlAnalyze_verilogfile (51, 2007-05-17)
project_2_temp_1\precision.log (8241, 2007-05-17)
project_2_temp_1\precision_rtl.sdc (985, 2007-05-17)
project_2_temp_1\project_2_impl_1.psi (1433, 2007-05-17)
project_2_temp_1\sys_con_rep.sdc (437, 2007-05-17)
project_2_temp_1\sys_fsm.rep (416, 2007-05-17)
project_2_temp_1\sys_rtl.ixdb (65922, 2007-05-17)
project_2_temp_1\unfolded_blocks.txt (0, 2007-05-17)
project_2_temp_1\rtlc_libs\work\.vextid.map (106, 2007-05-17)
project_2_temp_1\rtlc_libs\work\2ext0.pkg (6279, 2007-05-17)
project_2_temp_1\rtlc_libs\work\2ext1.pkg (5002, 2007-05-17)
project_2_temp_1\rtlc_libs\work\cheetah_tmp_file (0, 2007-05-17)
project_2_temp_1\rtlc_libs\work\clk_gate.mod (3272, 2007-05-17)
project_2_temp_1\rtlc_libs\work\clk_gate.mod.body (4808, 2007-05-17)
project_2_temp_1\rtlc_libs\work\main_bus.int (4570, 2007-05-17)
project_2_temp_1\rtlc_libs\work\main_bus.int.body (50578, 2007-05-17)
project_2_temp_1\rtlc_libs\work\rtlc_version_info (51, 2007-05-17)
project_2_temp_1\rtlc.out\.rtlc_compile (0, 2007-05-17)
project_2_temp_1\rtlc.out\.top (22, 2007-05-17)
project_2_temp_1\rtlc.out\autotop.conf (0, 2007-05-17)
project_2_temp_1\rtlc.out\legalmodmap.db (53, 2007-05-17)
project_2_temp_1\rtlc.out\rtlc.args (2511, 2007-05-17)
project_2_temp_1\rtlc.out\rtlc_args1.file (2970, 2007-05-17)
project_2_temp_1\rtlc.out\vmw.mem_contents (0, 2007-05-17)
project_2_temp_1\rtlc.out\INCR\emptymod.list (0, 2007-05-17)
project_2_temp_1\rtlc.out\INCR\hier.list (37, 2007-05-17)
project_2_temp_1\rtlc.out\INCR\incr_driver.log (0, 2007-05-17)
project_2_temp_1\rtlc.out\INCR\incr_rtlc.log (0, 2007-05-17)
project_2_temp_1\rtlc.out\FSM_REPORT\clk_gate.rpt (96, 2007-05-17)
project_2_temp_1\rtlc.out\FSM_REPORT\sys.rpt (156, 2007-05-17)
src\cpu.v (14831, 2003-07-12)
src\datapath.v (37776, 2003-07-12)
src\decode.v (118491, 2003-07-12)
src\defines.v (7394, 2003-07-12)
src\lib_fpga.v (3158, 2003-07-12)
src\mem.v (29684, 2003-07-12)
src\memory_board.v (10442, 2003-12-17)
... ...
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