Viterbi_algorithm_VeeRen
所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:75KB
下载次数:6
上传日期:2015-04-07 23:08:25
上 传 者:
hrreferral
说明: Viterbi algorithm using Verilog
文件列表:
Viterbi_algorithm_VeeRen\acs.v (9872, 2001-02-13)
Viterbi_algorithm_VeeRen\bmg.v (3865, 2001-02-13)
Viterbi_algorithm_VeeRen\control.v (2724, 2001-02-13)
Viterbi_algorithm_VeeRen\decoder.v (2588, 2001-02-13)
Viterbi_algorithm_VeeRen\dff.v (416, 2001-02-13)
Viterbi_algorithm_VeeRen\mmu.v (4150, 2001-02-13)
Viterbi_algorithm_VeeRen\params.v (1290, 2001-02-13)
Viterbi_algorithm_VeeRen\ram.v (10096, 2001-02-13)
Viterbi_algorithm_VeeRen\tbu.v (2296, 2001-02-13)
Viterbi_algorithm_VeeRen\testbench.v (14693, 2001-02-13)
Viterbi_algorithm_VeeRen\VDK9R12.jpg (22478, 2007-08-07)
Viterbi_algorithm_VeeRen\VDK9R12.pdf (59361, 2007-08-07)
Viterbi_algorithm_VeeRen\viterbi_encode9.v (1223, 2001-02-13)
Viterbi_algorithm_VeeRen (0, 2007-08-07)
近期下载者:
相关文件:
收藏者: