VITERBI_DECODER
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：123KB
下载次数：6
上传日期：2015-04-13 16:24:37
上 传 者：
leiznd
说明： Verilog语言描述的应用于TD-SCDMA中的viterbi译码器rate_1-2_Viterbi_decoder
(Applied in TD-SCDMA Verilog language description of the viterbi decoder rate_1-2_Viterbi_decoder)
文件列表:
Verilog_TD-SCDMA_Viterbi_decoder\sim\modelsim\do.txt (724, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\sim\icarus\block.list (591, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\sim\icarus\compile.bat (142, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\sim\icarus\gtk.bat (29, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\sim\icarus\run_random_data.bat (36, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\doc\interface define.txt (1127, 2009-02-04)
Verilog_TD-SCDMA_Viterbi_decoder\doc\Specification.pdf (132217, 2007-07-15)
Verilog_TD-SCDMA_Viterbi_decoder\bench\verilog\test_random_data.v (8503, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\bench\verilog\test_fix_data.v (4522, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\rtl\verilog\butfly2.v (1925, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\rtl\verilog\acs2.v (2373, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\rtl\verilog\brameter2.v (3027, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\rtl\verilog\delayT.v (1669, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\rtl\verilog\glb_def.v (1498, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\rtl\verilog\ctrl.v (5698, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\rtl\verilog\centrofilo.v (8063, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\rtl\verilog\dirtraback.v (24190, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\rtl\verilog\decoder.v (10090, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\rtl\verilog\tbdir_mod.v (2124, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\rtl\verilog\pe.v (2745, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\rtl\verilog\smu.v (3049, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\rtl\verilog\virtual_mem.v (2329, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\rtl\verilog\vit.v (43436, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\rtl\verilog\encoder.v (2477, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\sim\modelsim (0, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\sim\icarus (0, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\bench\verilog (0, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\rtl\verilog (0, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\sim (0, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\doc (0, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\bench (0, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder\rtl (0, 2009-02-09)
Verilog_TD-SCDMA_Viterbi_decoder (0, 2009-02-09)
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