Affichage_VGA
所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:3355KB
下载次数:7
上传日期:2015-04-14 02:57:12
上 传 者:
ross881
说明: Display image via VGA port in FPGA bord
文件列表:
Affichage_VGA (0, 2013-02-23)
Affichage_VGA\Affichage_VGA.gise (19056, 2013-02-23)
Affichage_VGA\Affichage_VGA.xise (34870, 2013-02-23)
Affichage_VGA\clkdiv.vhd (1157, 2012-12-29)
Affichage_VGA\Contrast Stretching.vhd (1650, 2013-02-23)
Affichage_VGA\coregen.cgc (2049, 2012-12-29)
Affichage_VGA\coregen.cgp (518, 2012-12-29)
Affichage_VGA\fuse.log (2937, 2013-01-11)
Affichage_VGA\ipcore_dir (0, 2013-02-23)
Affichage_VGA\ipcore_dir\blk_mem_gen_ds512.pdf (3259182, 2012-12-29)
Affichage_VGA\ipcore_dir\coregen.cgc (10991, 2013-02-22)
Affichage_VGA\ipcore_dir\coregen.cgp (518, 2013-02-22)
Affichage_VGA\ipcore_dir\coregen.log (463, 2013-02-22)
Affichage_VGA\ipcore_dir\coregen.rsp (350, 2013-02-22)
Affichage_VGA\ipcore_dir\picturerom.asy (351, 2012-12-29)
Affichage_VGA\ipcore_dir\picturerom.cgc (19916, 2012-12-29)
Affichage_VGA\ipcore_dir\picturerom.cgp (522, 2012-12-29)
Affichage_VGA\ipcore_dir\picturerom.gise (1369, 2013-02-23)
Affichage_VGA\ipcore_dir\picturerom.mif (384000, 2012-12-29)
Affichage_VGA\ipcore_dir\picturerom.ncf (0, 2013-02-23)
Affichage_VGA\ipcore_dir\picturerom.ngc (139843, 2012-12-29)
Affichage_VGA\ipcore_dir\picturerom.v (4748, 2012-12-29)
Affichage_VGA\ipcore_dir\picturerom.veo (3011, 2012-12-29)
Affichage_VGA\ipcore_dir\picturerom.vhd (5177, 2012-12-29)
Affichage_VGA\ipcore_dir\picturerom.vho (3298, 2012-12-29)
Affichage_VGA\ipcore_dir\picturerom.xco (2094, 2012-12-29)
Affichage_VGA\ipcore_dir\picturerom.xco.bak (2757, 2012-12-29)
Affichage_VGA\ipcore_dir\picturerom.xise (5057, 2012-12-29)
Affichage_VGA\ipcore_dir\picturerom_flist.txt (314, 2012-12-29)
Affichage_VGA\ipcore_dir\picturerom_xmdf.tcl (3223, 2012-12-29)
Affichage_VGA\ipcore_dir\tmp (0, 2013-02-22)
Affichage_VGA\ipcore_dir\tmp\_cg (0, 2013-02-22)
Affichage_VGA\ipcore_dir\tmp\_cg\picturerom.mif (384000, 2013-02-22)
Affichage_VGA\ipcore_dir\xlnx_auto_0_xdb (0, 2012-12-29)
Affichage_VGA\ipcore_dir\_xmsgs (0, 2013-01-19)
Affichage_VGA\ipcore_dir\_xmsgs\ngcbuild.xmsgs (367, 2012-12-29)
Affichage_VGA\ipcore_dir\_xmsgs\pn_parser.xmsgs (1068, 2013-02-23)
Affichage_VGA\ipcore_dir\_xmsgs\xst.xmsgs (205480, 2012-12-29)
Affichage_VGA\iseconfig (0, 2013-01-19)
... ...
The following files were generated for 'picturerom' in directory
C:\Users\FEMI\Documents\Projects\traitement d'image\Affichage_VGA\ipcore_dir\
blk_mem_gen_ds512.pdf:
Please see the core data sheet.
picturerom.asy:
Graphical symbol information file. Used by the ISE tools and some
third party tools to create a symbol representing the core.
picturerom.gise:
ISE Project Navigator support file. This is a generated file and should
not be edited directly.
picturerom.mif:
Memory Initialization File which is automatically generated by the
CORE Generator System for some modules when a simulation flow is
specified. A MIF data file is used to support HDL functional
simulation of modules which use arrays of values.
picturerom.ngc:
Binary Xilinx implementation netlist file containing the information
required to implement the module in a Xilinx (R) FPGA.
picturerom.v:
Verilog wrapper file provided to support functional simulation.
This file contains simulation model customization data that is
passed to a parameterized simulation model for the core.
picturerom.veo:
VEO template file containing code that can be used as a model for
instantiating a CORE Generator module in a Verilog design.
picturerom.vhd:
VHDL wrapper file provided to support functional simulation. This
file contains simulation model customization data that is passed to
a parameterized simulation model for the core.
picturerom.vho:
VHO template file containing code that can be used as a model for
instantiating a CORE Generator module in a VHDL design.
picturerom.xco:
CORE Generator input file containing the parameters used to
regenerate a core.
picturerom.xise:
ISE Project Navigator support file. This is a generated file and should
not be edited directly.
picturerom_readme.txt:
Text file indicating the files generated and how they are used.
picturerom_xmdf.tcl:
ISE Project Navigator interface file. ISE uses this file to determine
how the files output by CORE Generator for the core can be integrated
into your ISE project.
picturerom_flist.txt:
Text file listing all of the output files produced when a customized
core was generated in the CORE Generator.
Please see the Xilinx CORE Generator online help for further details on
generated files and how to use them.
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