VLSI-Signal-Generator
所属分类：VHDL/FPGA/Verilog
开发工具：HTML
文件大小：5549KB
下载次数：0
上传日期：2015-04-28 04:15:52
上 传 者：
sh-1993
说明： VHDL中使用DDS（直接数字合成）的超大规模集成电路信号发生器
(VLSI Signal Generator using DDS (Direct Digital Synthesis) in VHDL)
文件列表:
Materials (0, 2015-04-28)
Materials\DDS.pdf (403990, 2015-04-28)
Materials\DE1_UserManual_v1018.pdf (2415844, 2015-04-28)
Materials\ds001.pdf (1033667, 2015-04-28)
Materials\vhdl syntax (0, 2015-04-28)
Materials\vhdl syntax\attribute.html (5792, 2015-04-28)
Materials\vhdl syntax\concurrent.html (13923, 2015-04-28)
Materials\vhdl syntax\declare.html (17554, 2015-04-28)
Materials\vhdl syntax\design.html (26817, 2015-04-28)
Materials\vhdl syntax\misc.html (8613, 2015-04-28)
Materials\vhdl syntax\operator.html (4927, 2015-04-28)
Materials\vhdl syntax\reserved.html (8458, 2015-04-28)
Materials\vhdl syntax\sequential.html (10684, 2015-04-28)
Materials\vhdl syntax\stdpkg.html (8376, 2015-04-28)
Materials\vhdl syntax\summary.html (4754, 2015-04-28)
Materials\vhdl syntax\types.html (6256, 2015-04-28)
Materials\wDDS1.pdf (427473, 2015-04-28)
Materials\wDDS2.pdf (1120517, 2015-04-28)
VLSI_abstract.doc (26112, 2015-04-28)
arbitary wave values.m (336, 2015-04-28)
arbitrary wave instead of sine.vhd (4729, 2015-04-28)
assign1.doc (93696, 2015-04-28)
assign2.doc (167424, 2015-04-28)
final_tb.vhd (12832, 2015-04-28)
signalgenerator.cr.mti (969, 2015-04-28)
signalgenerator.mpf (56765, 2015-04-28)
sine taylor series.vhd (1783, 2015-04-28)
tut_quartus_intro_vhdl.pdf (1025624, 2015-04-28)
vlsi report.doc (384512, 2015-04-28)
vsim.wlf (40960, 2015-04-28)
# VLSI-Signal-Generator
Signal generator using Direct Digital Synthesis (DDS)
Supports
- Sine,
- cosine,
- triangle wave,
- saw tooth,
- square wave and
- any arbitrary repeating wave.
Written and verified in VHDL
With DAC couple to FPGA, it can generate signals and can be fed to external circuit.
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