fir_ipcore_test(can-use)
所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:5770KB
下载次数:6
上传日期:2015-05-23 15:31:17
上 传 者:
myles
说明: 基于virtex5的rom fir fft 三者ipcore联调
(Based virtex5 of rom fir fft three ipcore joint commissioning)
文件列表:
fir_ipcore_test(can use) (0, 2015-05-21)
fir_ipcore_test(can use)\RF1_coe.coe (5566, 2015-02-14)
fir_ipcore_test(can use)\_xmsgs (0, 2015-03-15)
fir_ipcore_test(can use)\_xmsgs\pn_parser.xmsgs (815, 2015-05-21)
fir_ipcore_test(can use)\_xmsgs\xst.xmsgs (7430, 2015-02-14)
fir_ipcore_test(can use)\data (0, 2015-03-06)
fir_ipcore_test(can use)\data\data_output.txt (6341, 2015-02-14)
fir_ipcore_test(can use)\data\fft_ouput_i.txt (3227, 2015-03-06)
fir_ipcore_test(can use)\data\fft_ouput_r.txt (3172, 2015-03-06)
fir_ipcore_test(can use)\data\fir_coe.coe (308, 2015-02-14)
fir_ipcore_test(can use)\data\kaiser.coe (308, 2015-02-14)
fir_ipcore_test(can use)\fir_ipcore.mif (231, 2015-02-08)
fir_ipcore_test(can use)\fir_ipcore2.mif (210, 2015-02-14)
fir_ipcore_test(can use)\fir_ipcore2COEFF_auto0_0.mif (170, 2015-02-14)
fir_ipcore_test(can use)\fir_ipcore2COEFF_auto0_1.mif (55, 2015-02-09)
fir_ipcore_test(can use)\fir_ipcore2COEFF_auto0_2.mif (55, 2015-02-09)
fir_ipcore_test(can use)\fir_ipcore2filt_decode_rom.mif (102, 2015-02-14)
fir_ipcore_test(can use)\fir_ipcoreCOEFF_auto0_0.mif (187, 2015-02-08)
fir_ipcore_test(can use)\fir_ipcore_test.gise (8869, 2015-05-21)
fir_ipcore_test(can use)\fir_ipcore_test.xise (34746, 2015-05-21)
fir_ipcore_test(can use)\fir_ipcorefilt_decode_rom.mif (102, 2015-02-08)
fir_ipcore_test(can use)\fir_rom_tb.fdo (0, 2015-05-21)
fir_ipcore_test(can use)\fir_rom_tb.udo (383, 2015-02-08)
fir_ipcore_test(can use)\fir_rom_tb_wave.fdo (428, 2015-02-08)
fir_ipcore_test(can use)\fir_rom_test.cmd_log (5920, 2015-02-14)
fir_ipcore_test(can use)\fir_rom_test.fdo (1389, 2015-02-11)
fir_ipcore_test(can use)\fir_rom_test.lso (6, 2015-02-14)
fir_ipcore_test(can use)\fir_rom_test.ngc (31261, 2015-02-14)
fir_ipcore_test(can use)\fir_rom_test.ngr (15679, 2015-02-14)
fir_ipcore_test(can use)\fir_rom_test.prj (156, 2015-02-14)
fir_ipcore_test(can use)\fir_rom_test.stx (0, 2015-02-14)
fir_ipcore_test(can use)\fir_rom_test.syr (28782, 2015-02-14)
fir_ipcore_test(can use)\fir_rom_test.udo (385, 2015-02-11)
fir_ipcore_test(can use)\fir_rom_test.xst (1180, 2015-02-14)
fir_ipcore_test(can use)\fir_rom_test_envsettings.html (9984, 2015-05-21)
fir_ipcore_test(can use)\fir_rom_test_summary.html (5898, 2015-05-21)
fir_ipcore_test(can use)\fir_rom_test_wave.fdo (430, 2015-02-11)
fir_ipcore_test(can use)\fir_rom_test_xst.xrpt (14887, 2015-02-14)
fir_ipcore_test(can use)\ipcore_dir (0, 2015-03-15)
fir_ipcore_test(can use)\ipcore_dir\RF1_coe.coe (5566, 2015-02-14)
... ...
The following files were generated for 'fir_ipcore' in directory
D:\desk\Code\FPGA\Xilinx_Fpga\fir_ipcore_test\ipcore_dir\
Model Parameter Resolution:
Resolves generated model parameter values on the component instance.
* fir_ipcore.mif
XCO file generator:
Generate an XCO file for compatibility with legacy flows.
* fir_ipcore.xco
Creates an implementation netlist:
Creates an implementation netlist for the IP.
* fir_ipcore.ngc
* fir_ipcore.v
* fir_ipcore.veo
* fir_ipcoreCOEFF_auto0_0.mif
* fir_ipcorefilt_decode_rom.mif
Creates an HDL instantiation template:
Creates an HDL instantiation template for the IP.
* fir_ipcore.veo
IP Symbol Generator:
Generate an IP symbol based on the current project options'.
* fir_ipcore.asy
SYM file generator:
Generate a SYM file for compatibility with legacy flows
* fir_ipcore.sym
Generate ISE metadata:
Create a metadata file for use when including this core in ISE designs
* fir_ipcore_xmdf.tcl
Generate ISE subproject:
Create an ISE subproject for use when including this core in ISE designs
* _xmsgs/pn_parser.xmsgs
* fir_ipcore.gise
* fir_ipcore.xise
Deliver Readme:
Readme file for the IP.
* fir_ipcore_readme.txt
Generate FLIST file:
Text file listing all of the output files produced when a customized core was
generated in the CORE Generator.
* fir_ipcore_flist.txt
Please see the Xilinx CORE Generator online help for further details on
generated files and how to use them.
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