DPIM
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：5352KB
下载次数：22
上传日期：2015-05-24 09:42:59
上 传 者：
jiaoyanhua
说明： 用Verilog实现DPIM调制，已经做过实验，证明对的
(Verilog DPIM modulation fine)
文件列表:
DPIM (0, 2015-05-24)
DPIM\receive-NEW (0, 2015-05-24)
DPIM\receive-NEW\BitV.bsf (1754, 2013-03-27)
DPIM\receive-NEW\BitV.v (1435, 2013-04-17)
DPIM\receive-NEW\BitV.v.bak (1429, 2013-03-27)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用 (0, 2015-05-24)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\DataSource.bsf (2171, 2012-04-14)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\DataSource.vhd (2454, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\DataSource.vhd.bak (2454, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\EZUSBtransfer.bdf (17421, 2013-03-17)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\EZUSBtransfer.bsf (5026, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\FreQ.bsf (1578, 2012-04-11)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\FreQ.vhd (722, 2012-04-11)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\FreQ.vhd.bak (722, 2012-04-11)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\FreQ.vwf (6164, 2012-04-11)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.asm.rpt (9239, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.bdf (15273, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.cdf (376, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.done (26, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.dpf (239, 2012-04-13)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.fit.rpt (144309, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.fit.smsg (411, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.fit.summary (427, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.flow.rpt (9071, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.jdi (21, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.map.rpt (79784, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.map.summary (335, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.pin (30979, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.pof (524474, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.qpf (915, 2012-04-11)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.qsf (4869, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.qws (448, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.sim.rpt (207349, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.sof (140505, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.tan.rpt (210898, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.tan.summary (2517, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFIFO_FPGA.vwf (46707, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFiFo_Write.bsf (3528, 2012-04-14)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFiFo_Write.vhd (3966, 2012-04-15)
DPIM\receive-NEW\EZUSB_FPGA连续传输加FIFO缓冲半空标志控制使用\SlaveFiFo_Write.vhd.bak (3966, 2012-04-15)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
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