HDL_Syn_V3.1
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：53KB
下载次数：16
上传日期：2015-06-15 19:09:27
上 传 者：
yuc126
说明： 哈夫曼编码 包括synthesis优化。
Huffman encoding verilog code including synthesis optimization.
(Huffman coding involves synthesis optimization. Huffman encoding verilog code including synthesis optimization.)
文件列表:
HDL_Syn_V3.1 (0, 2014-12-14)
HDL_Syn_V3.1\huffman.sv (6710, 2014-12-14)
HDL_Syn_V3.1\huffman_test.sv (1448, 2014-12-10)
HDL_Syn_V3.1\huffman_v3.1.cr.mti (315, 2014-12-14)
HDL_Syn_V3.1\huffman_v3.1.mpf (92035, 2014-12-14)
HDL_Syn_V3.1\huffman_v3.1.sv (6745, 2014-12-14)
HDL_Syn_V3.1\vsim.wlf (49152, 2014-12-14)
HDL_Syn_V3.1\work (0, 2014-12-14)
HDL_Syn_V3.1\work\_info (1312, 2014-12-14)
HDL_Syn_V3.1\work\_lib.qdb (49152, 2014-12-14)
HDL_Syn_V3.1\work\_lib1_1.qdb (32768, 2014-12-14)
HDL_Syn_V3.1\work\_lib1_1.qpg (131072, 2014-12-14)
HDL_Syn_V3.1\work\_lib1_1.qtl (40777, 2014-12-14)
HDL_Syn_V3.1\work\_vmake (29, 2014-12-14)
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