vga_verilog
所属分类：VHDL/FPGA/Verilog
开发工具：Others
文件大小：13585KB
下载次数：42
上传日期：2015-07-13 10:06:06
上 传 者：
yiyedada
说明： 在DE1-SOC上运行的verilog HDL代码，可以驱动VGA显示彩条。quartus II 14.0可以直接使用
(Verilog HDL code running on DE1-SOC, can drive VGA display color bars. quartus II 14.0 can be used directly)
文件列表:
vga_verilog\c5_pin_model_dump.txt (4875, 2015-07-09)
vga_verilog\CLK_RST.v (304, 2015-07-09)
vga_verilog\CLK_RST.v.bak (0, 2015-07-09)
vga_verilog\DA_IF.v (498, 2015-07-09)
vga_verilog\DA_IF.v.bak (0, 2015-07-08)
vga_verilog\db\.cmp.kpt (1505, 2015-07-09)
vga_verilog\db\altsyncram_o784.tdf (53706, 2015-07-09)
vga_verilog\db\cmpr_99c.tdf (1753, 2015-07-09)
vga_verilog\db\cmpr_d9c.tdf (2075, 2015-07-09)
vga_verilog\db\cmpr_e9c.tdf (2145, 2015-07-09)
vga_verilog\db\cntr_29i.tdf (4320, 2015-07-09)
vga_verilog\db\cntr_49i.tdf (4486, 2015-07-09)
vga_verilog\db\cntr_82j.tdf (4908, 2015-07-09)
vga_verilog\db\cntr_kri.tdf (3614, 2015-07-09)
vga_verilog\db\decode_vnf.tdf (1634, 2015-07-09)
vga_verilog\db\ip\sld62b969af\alt_sld_fab.qip (11305, 2015-07-09)
vga_verilog\db\ip\sld62b969af\alt_sld_fab.sopcinfo (52801, 2015-07-09)
vga_verilog\db\ip\sld62b969af\alt_sld_fab.v (20640, 2015-07-09)
vga_verilog\db\ip\sld62b969af\alt_sld_fab__report.html (15117, 2015-07-09)
vga_verilog\db\ip\sld62b969af\alt_sld_fab__report.xml (17761, 2015-07-09)
vga_verilog\db\ip\sld62b969af\submodules\alt_sld_fab_ident.sv (3228, 2015-07-09)
vga_verilog\db\ip\sld62b969af\submodules\alt_sld_fab_presplit.sv (560, 2015-07-09)
vga_verilog\db\ip\sld62b969af\submodules\alt_sld_fab_sldfabric.vhd (12688, 2015-07-09)
vga_verilog\db\ip\sld62b969af\submodules\alt_sld_fab_splitter.sv (2168, 2015-07-09)
vga_verilog\db\mux_flc.tdf (5385, 2015-07-09)
vga_verilog\db\prev_cmp_VGA_BAR.qmsg (80874, 2015-07-09)
vga_verilog\db\VGA_BAR.(0).cnf.cdb (3517, 2015-07-09)
vga_verilog\db\VGA_BAR.(0).cnf.hdb (1828, 2015-07-09)
vga_verilog\db\VGA_BAR.(1).cnf.cdb (1088, 2015-07-09)
vga_verilog\db\VGA_BAR.(1).cnf.hdb (745, 2015-07-09)
vga_verilog\db\VGA_BAR.(10).cnf.cdb (6510, 2015-07-09)
vga_verilog\db\VGA_BAR.(10).cnf.hdb (2547, 2015-07-09)
vga_verilog\db\VGA_BAR.(11).cnf.cdb (27523, 2015-07-09)
vga_verilog\db\VGA_BAR.(11).cnf.hdb (10911, 2015-07-09)
vga_verilog\db\VGA_BAR.(12).cnf.cdb (5154, 2015-07-09)
vga_verilog\db\VGA_BAR.(12).cnf.hdb (2904, 2015-07-09)
vga_verilog\db\VGA_BAR.(13).cnf.cdb (1854, 2015-07-09)
vga_verilog\db\VGA_BAR.(13).cnf.hdb (721, 2015-07-09)
vga_verilog\db\VGA_BAR.(14).cnf.cdb (4019, 2015-07-09)
vga_verilog\db\VGA_BAR.(14).cnf.hdb (1919, 2015-07-09)
... ...
This folder contains data for incremental compilation.
The compiled_partitions sub-folder contains previous compilation results for each partition.
As long as this folder is preserved, incremental compilation results from earlier compiles
can be re-used. To perform a clean compilation from source files for all partitions, both
the db and incremental_db folder should be removed.
The imported_partitions sub-folder contains the last imported QXP for each imported partition.
As long as this folder is preserved, imported partitions will be automatically re-imported
when the db or incremental_db/compiled_partitions folders are removed.
近期下载者：
相关文件：
收藏者：