LIP7101CORE_Handheld_Bike_Computer

所属分类:VHDL/FPGA/Verilog
开发工具:VHDL
文件大小:662KB
下载次数:7
上传日期:2011-02-28 19:55:10
上 传 者joneychen12
说明:  Handheld Bike computer verilog code

文件列表:
HBC_1\.untf (0, 2007-06-16)
HBC_1\automake.log (0, 2007-06-16)
HBC_1\clk_divider.vhd (1011, 2007-06-16)
HBC_1\cooltrak.vhd (11695, 2007-06-16)
HBC_1\HBC_1.dhp (61446, 2007-06-17)
HBC_1\HBC_1.ise (4670, 2007-06-17)
HBC_1\HBC_1.ise_ISE_Backup (4670, 2007-06-17)
HBC_1\multi_dvm.bld (734, 2007-06-16)
HBC_1\multi_dvm.cel (0, 2007-06-16)
HBC_1\multi_dvm.cmd_log (275, 2007-06-16)
HBC_1\multi_dvm.lso (6, 2007-06-16)
HBC_1\multi_dvm.ngc (35504, 2007-06-16)
HBC_1\multi_dvm.ngd (59288, 2007-06-16)
HBC_1\multi_dvm.ngr (71701, 2007-06-16)
HBC_1\multi_dvm.prj (100, 2007-06-16)
HBC_1\multi_dvm.stx (0, 2007-06-16)
HBC_1\multi_dvm.syr (27955, 2007-06-16)
HBC_1\multi_dvm.ucf (0, 1980-01-01)
HBC_1\multi_dvm.vhd (38286, 2007-06-16)
HBC_1\multi_dvm_summary.html (3147, 2007-06-16)
HBC_1\Project.dhp (61566, 2007-06-16)
HBC_1\shift16.vhd (1788, 2007-06-16)
HBC_1\shift8.vhd (1748, 2007-06-16)
HBC_1\speed.vhd (1867, 2007-06-16)
HBC_1\temp.vhd (36822, 2007-06-16)
HBC_1\time_sim.vhd (256641, 2007-06-16)
HBC_1\upcnt5.vhd (1561, 2007-06-16)
HBC_1\upcnt5_summary.html (2448, 2007-06-16)
HBC_1\__projnav.log (16295, 2007-06-16)
HBC_1\__projnav\ednTOngd_tcl.rsp (54, 2007-06-16)
HBC_1\__projnav\HBC_1.gfl (610, 2007-06-16)
HBC_1\__projnav\HBC_1_flowplus.gfl (119, 2007-06-16)
HBC_1\__projnav\multi_dvm.xst (1103, 2007-06-16)
HBC_1\__projnav\parentCreateTimingConstraintsApp_tcl.rsp (11, 2007-06-16)
HBC_1\__projnav\runXst_tcl.rsp (71, 2007-06-16)
HBC_1\__projnav\sumrpt_tcl.rsp (18, 2007-06-16)
HBC_1\_ngo\netlist.lst (136, 2007-06-16)
HBC_1\xst\work\hdllib.ref (1308, 2007-06-16)
HBC_1\xst\work\hdpdeps.ref (2462, 2007-06-16)
HBC_1\xst\work\sub00\vhpl00.vho (1234, 2007-06-16)
... ...

Readme.txt XAPP370.zip contains the source files for the Cool Module Design Contest Grand Prize Winner, CoolTrak. CoolTrak is a handheld bike computer that utilizes a Handspring Visor and an Insight Springboard Development Kit featuring a Xilinx ultra-low power CoolRunner CPLD. This zip file contains two folders: PocketC -- C source files compiled using the Orbworks PocketC compiler. Please refer to www.orbworks.com for more information. VHDL -- This folder contains the VHDL files that were compiled using the Xilinx free WebPACK software tools. The complete WebPACK Project files are also included in this folder.

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