LIP6921CORE_decss
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：660KB
下载次数：8
上传日期：2011-02-28 19:57:40
上 传 者：
joneychen12
说明： Encry Decry DECESS verilog code
文件列表:
C\c-anonymous.c (10446, 2001-09-27)
C\d.bat (15, 2001-09-27)
C\DeCSS_dsp.txt (4347, 2001-09-27)
C\DeCSS_dsw.txt (537, 2001-09-27)
C\DeCSS_Test.c (758, 2001-09-27)
verilog\Copy of CSTable_1.v (596, 2007-06-11)
verilog\Copy of CSTable_2.v (596, 2007-06-11)
verilog\CSTable_1.txt (855, 2001-09-27)
verilog\CSTable_1.v (596, 2007-06-11)
verilog\CSTable_1.v.bak (629, 2001-09-27)
verilog\CSTable_2.txt (855, 2001-09-27)
verilog\CSTable_2.v (596, 2007-06-11)
verilog\CSTable_2.v.bak (629, 2001-09-27)
verilog\CSTable_3.txt (1671, 2001-09-27)
verilog\CSTable_3.v (596, 2007-06-11)
verilog\CSTable_3.v.bak (629, 2001-09-27)
verilog\CSTable_4.txt (855, 2001-09-27)
verilog\CSTable_4.v (596, 2007-06-11)
verilog\CSTable_4.v.bak (629, 2001-09-27)
verilog\CSTable_5.prj (1017, 2001-09-27)
verilog\CSTable_5.txt (855, 2001-09-27)
verilog\CSTable_5.v (596, 2007-06-11)
verilog\CSTable_5.v.bak (629, 2001-09-27)
verilog\decss.v (3762, 2001-09-27)
... ...
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