SHA3-VHDL
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：202KB
下载次数：8
上传日期：2015-11-03 23:39:35
上 传 者：
Zerox
说明： SHA3 VHDL implementation
FPGA proven
文件列表:
buffer_fn.vhd (4107, 2014-11-25)
keccak.vhd (6372, 2014-11-25)
keccak_in.txt (428985, 2014-11-25)
keccak_out.txt (90000, 2014-11-25)
round_constant.vhd (2002, 2014-11-25)
round_fn.vhd (6941, 2014-11-25)
round_fn_in.txt (4533, 2014-11-25)
round_fn_out.txt (4530, 2014-11-25)
tb_keccak.vhd (5510, 2014-11-25)
tb_round_fn.vhd (4422, 2014-11-25)
user_types.vhd (537, 2014-11-25)
This project is Hardware implementation of SHA-3(keccak) cryptographic hash function using VHDL designed by Guido Bertoni, Joan Daemen, Michal Peeters, and Gilles Van Assche, building upon RadioGatún.
SHA-3 uses the sponge construction in which message blocks are XORed into a subset of the state, which is then transformed as a whole. In the version used in SHA-3, the state consists of a 5×5 array of ***-bit words, 1600 bits total.
references
http://keccak.noekeon.org/
The project can also be found on opencores at http://opencores.org/project,sha-3
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