DES_verilog
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：466KB
下载次数：5
上传日期：2015-12-24 16:44:55
上 传 者：
alvinr
说明： 用verilog实现的DES(Data Encryption Standard数据加密标准)，把64位明文输入变为64位密文输出块。
(Using DES (Data Encryption Standard Data Encryption Standard) verilog to achieve, the 64 plaintext input into 64 output ciphertext block.)
文件列表:
11.1 (0, 2015-12-18)
11.1\chart (0, 2015-12-18)
11.1\chart\Thumbs.db (57344, 2007-12-10)
11.1\chart\ͼ11-12.bmp (371478, 2007-08-21)
11.1\chart\ͼ11-13.bmp (411774, 2007-08-21)
11.1\chart\ͼ11-14.bmp (315254, 2007-08-21)
11.1\chart\ͼ11-15.bmp (499374, 2007-08-21)
11.1\chart\ͼ11-16.bmp (499374, 2007-08-21)
11.1\chart\ͼ11-19.bmp (463958, 2007-08-21)
11.1\chart\ͼ11-20.bmp (466086, 2007-08-21)
11.1\chart\ͼ11-5.bmp (429834, 2007-08-21)
11.1\chart\ͼ11-6.bmp (455574, 2007-08-21)
11.1\chart\ͼ11-8.bmp (359606, 2007-08-21)
11.1\chart\ͼ11-9.bmp (371478, 2007-08-21)
11.1\chart\表11-1.bmp (316134, 2007-08-21)
11.1\chart\表11-2.bmp (316134, 2007-08-21)
11.1\chart\表11-3.bmp (280374, 2007-08-21)
11.1\chart\表11-4.bmp (214286, 2007-08-21)
11.1\chart\表11-5.bmp (272234, 2007-08-21)
11.1\chart\表11-6.bmp (277502, 2007-08-21)
11.1\chart\表11-8.bmp (252342, 2007-08-21)
11.1\chart\表11-9.bmp (252342, 2007-08-21)
11.1\des.cr.mti (2631, 2007-08-23)
11.1\des.mpf (20608, 2007-08-21)
11.1\des.v (9422, 2007-08-21)
11.1\des_testbench.v (2025, 2007-08-21)
11.1\desround.v (4330, 2007-08-21)
11.1\key_gen.v (4691, 2007-08-23)
11.1\s1.v (2397, 2007-08-21)
11.1\s2.v (2397, 2007-08-21)
11.1\s3.v (2397, 2007-08-21)
11.1\s4.v (2395, 2007-08-21)
11.1\s5.v (2396, 2007-08-21)
11.1\s6.v (2397, 2007-08-21)
11.1\s7.v (2396, 2007-08-21)
11.1\s8.v (2394, 2007-08-21)
11.1\transcript (0, 2007-08-23)
11.1\vsim.wlf (81920, 2007-08-21)
11.1\wave (0, 2015-12-18)
11.1\wave\Thumbs.db (16896, 2007-12-10)
... ...
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