an181_2_2
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：804KB
下载次数：1
上传日期：2015-12-25 09:41:08
上 传 者：
锅仔
说明： Excalibur FPGA多主参考设计
(Excalibur Solutions—
Multi-Master Reference Design)
文件列表:
an181_2_2.pdf (778320, 2002-11-12)
example_designs (0, 2002-11-12)
example_designs\multimaster_ahb (0, 2002-11-12)
example_designs\multimaster_ahb\ads (0, 2002-11-12)
example_designs\multimaster_ahb\ads\debug.fsf (813, 2002-07-23)
example_designs\multimaster_ahb\ads\embedded_stripe.bsf (9186, 2002-07-23)
example_designs\multimaster_ahb\ads\embedded_stripe.h (2444, 2002-07-23)
example_designs\multimaster_ahb\ads\embedded_stripe.s (2370, 2002-07-23)
example_designs\multimaster_ahb\ads\embedded_stripe.v (5760, 2002-07-23)
example_designs\multimaster_ahb\ads\embedded_stripe_bb.v (3321, 2002-07-23)
example_designs\multimaster_ahb\ads\memmap.v (1943, 2002-07-23)
example_designs\multimaster_ahb\ads\multi_master_reference_design.csf (9780, 2002-11-12)
example_designs\multimaster_ahb\ads\multi_master_reference_design.esf (364188, 2002-11-12)
example_designs\multimaster_ahb\ads\multi_master_reference_design.psf (8141, 2002-11-12)
example_designs\multimaster_ahb\ads\multi_master_reference_design.quartus (1825, 2002-11-12)
example_designs\multimaster_ahb\ads\multi_master_reference_design.sbd (7021, 2002-07-23)
example_designs\multimaster_ahb\ads\multi_master_reference_design.ssf (449, 2002-11-12)
example_designs\multimaster_ahb\ads\powerkit.tcl (8638, 2002-07-23)
example_designs\multimaster_ahb\ads\powerkit_lib.tcl (277671, 2002-07-23)
example_designs\multimaster_ahb\ads\release.fsf (482, 2002-07-23)
example_designs\multimaster_ahb\ads\sbd2sim.bat (378, 2002-07-23)
example_designs\multimaster_ahb\ads\simulation (0, 2002-11-12)
example_designs\multimaster_ahb\ads\simulation\modelsim (0, 2002-11-12)
example_designs\multimaster_ahb\ads\simulation\modelsim\bus_translate.bat (27, 2002-11-12)
example_designs\multimaster_ahb\ads\simulation\modelsim\compile_and_run_rtl_busfuncmodel_v.do (338, 2002-07-23)
example_designs\multimaster_ahb\ads\simulation\modelsim\compile_and_run_rtl_fullmodel_v.do (334, 2002-07-23)
example_designs\multimaster_ahb\ads\simulation\modelsim\compile_and_run_timing_busfuncmodel_v.do (374, 2002-07-23)
example_designs\multimaster_ahb\ads\simulation\modelsim\compile_and_run_timing_fullmodel_v.do (436, 2002-07-23)
example_designs\multimaster_ahb\ads\simulation\modelsim\input.dat (1417, 2002-07-23)
example_designs\multimaster_ahb\ads\simulation\modelsim\modelsim.mpf (10800, 2002-11-12)
example_designs\multimaster_ahb\ads\simulation\modelsim\slavememory.0.dat (226, 2002-07-23)
example_designs\multimaster_ahb\ads\simulation\modelsim\slavememory.cfg.dat (1732, 2002-07-23)
example_designs\multimaster_ahb\ads\simulation\modelsim\wave_interconnect_matrix.do (24619, 2002-07-23)
example_designs\multimaster_ahb\ads\simulation\modelsim\wave_rtl_bfm.do (21765, 2002-07-23)
example_designs\multimaster_ahb\ads\simulation\modelsim\wave_rtl_fullstripe.do (25960, 2002-07-23)
example_designs\multimaster_ahb\ads\simulation\modelsim\wave_timing_busfuncmodel.do (3131, 2002-07-23)
example_designs\multimaster_ahb\ads\simulation\modelsim\wave_timing_fullstripe.do (9616, 2002-07-23)
example_designs\multimaster_ahb\ads\software (0, 2002-11-12)
example_designs\multimaster_ahb\ads\software\multi_master_reference_design.s (4969, 2002-07-23)
example_designs\multimaster_ahb\gnu (0, 2002-11-12)
... ...
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