VHDL_freerisc8
所属分类：VHDL/FPGA/Verilog
开发工具：TEXT
文件大小：258KB
下载次数：50
上传日期：2006-02-15 10:58:14
上 传 者：
power_onet007
说明： 一个8位RiSC单片机的VHDL代码，
具有很好的参考价值。
(an eight RiSC SCM VHDL code, is a good reference value.)
文件列表:
freerisc8_11 (0, 2000-06-07)
freerisc8_11\freerisc8_11.exe (163840, 2106-02-06)
freerisc8_11\Makefile (978, 2000-03-01)
freerisc8_11\Verilog (0, 2005-07-16)
freerisc8_11\Verilog\alu.v (2797, 2000-03-01)
freerisc8_11\Verilog\basic.asm (9976, 2000-03-01)
freerisc8_11\Verilog\BASIC.HEX (1458, 2000-03-01)
freerisc8_11\Verilog\basic.rom (2287, 2000-03-01)
freerisc8_11\Verilog\cpu.v (27610, 2000-03-01)
freerisc8_11\Verilog\dds.asm (3898, 2000-03-01)
freerisc8_11\Verilog\DDS.HEX (366, 2000-03-01)
freerisc8_11\Verilog\dds.rom (532, 2000-03-01)
freerisc8_11\Verilog\dram.v (2952, 2000-03-01)
freerisc8_11\Verilog\exp.v (3990, 2000-03-01)
freerisc8_11\Verilog\hex2v (10916, 2000-03-01)
freerisc8_11\Verilog\hex2v.c (4083, 2000-03-01)
freerisc8_11\Verilog\idec.v (7568, 2000-03-01)
freerisc8_11\Verilog\pram.v (1869, 2000-03-01)
freerisc8_11\Verilog\regs.v (5501, 2000-03-01)
freerisc8_11\Verilog\runit (63, 2000-03-01)
freerisc8_11\Verilog\sindata.c (740, 2000-03-01)
freerisc8_11\Verilog\sindata.hex (8193, 2000-03-01)
freerisc8_11\Verilog\test.v (19488, 2000-03-01)
freerisc8_11\VHDL (0, 2005-07-16)
freerisc8_11\VHDL\ramlib_quartus.vhd (6188, 2000-03-01)
freerisc8_11\VHDL\ramlib_sim.vhd (6027, 2000-03-01)
freerisc8_11\VHDL\ramlib_xil.vhd (26932, 2000-03-01)
freerisc8_11\www (0, 2005-07-16)
freerisc8_11\www\freerisc8_legal.htm (12439, 2000-03-01)
freerisc8_11\www\images (0, 2005-07-16)
freerisc8_11\www\index.htm (7961, 2000-03-01)
freerisc8_11\www\risc8a.gif (22125, 2000-03-01)
freerisc8_11\www\risc8a_small.gif (724, 2000-03-01)
freerisc8_11\www\risc8_manual.htm (217076, 2000-03-01)
freerisc8_11\www\_borders (0, 2005-07-16)
freerisc8_11\www\_borders\bottom.htm (957, 2000-03-01)
freerisc8_11\www\_borders\_vti_cnf (0, 2005-07-16)
freerisc8_11\www\_borders\_vti_cnf\bottom.htm (873, 2000-03-01)
freerisc8_11\www\_derived (0, 2005-07-16)
... ...
----------------------------------------------------------------------------
----------------------------------------------------------------------------
-- The Free IP Project
-- VHDL Free-RISC8 Core
-- (c) 1999-2000, The Free IP Project
--
--
-- FREE IP GENERAL PUBLIC LICENSE
-- TERMS AND CONDITIONS FOR USE, COPYING, DISTRIBUTION, AND MODIFICATION
--
-- 1. You may copy and distribute verbatim copies of this core, as long
-- as this file, and the other associated files, remain intact and
-- unmodified. Modifications are outlined below.
-- 2. You may use this core in any way, be it academic, commercial, or
-- military. Modified or not.
-- 3. Distribution of this core must be free of charge. Charging is
-- allowed only for value added services. Value added services
-- would include copying fees, modifications, customizations, and
-- inclusion in other products.
-- 4. If a modified source code is distributed, the original unmodified
-- source code must also be included (or a link to the Free IP web
-- site). In the modified source code there must be clear
-- identification of the modified version.
-- 5. Visit the Free IP web site for documentation and additional
-- information. http://www.free-ip.com
--
----------------------------------------------------------------------------
----------------------------------------------------------------------------
This is version 1.1 (Feb 2000) of the Free-RISC8 core
HTML documentation can be found in the www/ directory.
----------------------------------------------------------------------------
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