shuzizhong
所属分类：VHDL/FPGA/Verilog
开发工具：Others
文件大小：414KB
下载次数：11
上传日期：2016-05-13 17:52:33
上 传 者：
Mr.BB
说明： 基于basys2的简易数字钟，包含校时功能
(A simple digital clock base on basys2 board, including timing function.)
文件列表:
shuzizhong\_ngo (0, 2016-05-13)
shuzizhong\_ngo\netlist.lst (63, 2016-05-10)
shuzizhong\_xmsgs (0, 2016-05-13)
shuzizhong\_xmsgs\bitgen.xmsgs (367, 2016-05-10)
shuzizhong\_xmsgs\map.xmsgs (741, 2016-05-10)
shuzizhong\_xmsgs\ngdbuild.xmsgs (367, 2016-05-10)
shuzizhong\_xmsgs\par.xmsgs (1442, 2016-05-10)
shuzizhong\_xmsgs\pn_parser.xmsgs (760, 2016-05-10)
shuzizhong\_xmsgs\trce.xmsgs (1720, 2016-05-10)
shuzizhong\_xmsgs\xst.xmsgs (367, 2016-05-10)
shuzizhong\d_clock.bgn (4585, 2016-05-10)
shuzizhong\d_clock.bit (72760, 2016-05-10)
shuzizhong\D_Clock.bld (1017, 2016-05-10)
shuzizhong\D_Clock.cmd_log (38018, 2016-05-10)
shuzizhong\d_clock.drc (188, 2016-05-10)
shuzizhong\D_Clock.lso (6, 2016-05-10)
shuzizhong\D_Clock.ncd (85206, 2016-05-10)
shuzizhong\D_Clock.ngc (85735, 2016-05-10)
shuzizhong\D_Clock.ngd (136104, 2016-05-10)
shuzizhong\D_Clock.ngr (107579, 2016-05-10)
shuzizhong\D_Clock.pad (6874, 2016-05-10)
shuzizhong\D_Clock.par (7637, 2016-05-10)
shuzizhong\D_Clock.pcf (1481, 2016-05-10)
shuzizhong\D_Clock.prj (26, 2016-05-10)
shuzizhong\D_Clock.ptwx (17228, 2016-05-10)
shuzizhong\D_Clock.stx (0, 2016-05-10)
shuzizhong\D_Clock.syr (18212, 2016-05-10)
shuzizhong\D_Clock.twr (4717, 2016-05-10)
shuzizhong\D_Clock.twx (24518, 2016-05-10)
shuzizhong\D_Clock.ucf (609, 2016-05-10)
shuzizhong\D_Clock.unroutes (157, 2016-05-10)
shuzizhong\D_Clock.ut (393, 2016-05-10)
shuzizhong\D_Clock.v (4095, 2016-05-10)
shuzizhong\D_Clock.xpi (46, 2016-05-10)
shuzizhong\D_Clock.xst (1143, 2016-05-10)
shuzizhong\D_Clock_bitgen.xwbt (248, 2016-05-10)
shuzizhong\D_Clock_envsettings.html (11893, 2016-05-10)
shuzizhong\D_Clock_guide.ncd (85206, 2016-05-10)
shuzizhong\D_Clock_map.map (2640, 2016-05-10)
shuzizhong\D_Clock_map.mrp (9314, 2016-05-10)
... ...
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