myfft
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：62KB
下载次数：1
上传日期：2016-05-19 10:35:12
上 传 者：
jianyonghu
说明： 锁相环程序，适用于cyclone III,产生100kHz时钟信号。
(Phase-locked loop program, suitable for cyclone III, produce 100 KHZ the clock signal.)
文件列表:
myfft (0, 2016-05-19)
myfft\FLOAT2.PIF (967, 2001-03-17)
myfft\FLOAT_RE.TXT (370, 2001-03-21)
myfft\IEEE_TO_.PIF (967, 2001-03-17)
myfft\and_gates.vhd (1003, 2001-03-20)
myfft\baseindex.vhd (1998, 2001-03-20)
myfft\but.vhd (761, 2001-03-20)
myfft\butter_lib.vhd (3271, 2001-03-20)
myfft\comm.txt (12, 2001-03-17)
myfft\control2.vhd (2965, 2001-03-17)
myfft\controller.vhd (3389, 2001-03-20)
myfft\counter.vhd (814, 2001-03-20)
myfft\cycles_but.vhd (1388, 2001-03-20)
myfft\db (0, 2016-05-19)
myfft\db\logic_util_heursitic.dat (0, 2016-05-19)
myfft\db\prev_cmp_synth_main.qmsg (4398, 2016-05-19)
myfft\db\synth_main.cbx.xml (92, 2016-05-19)
myfft\db\synth_main.cmp.rdb (4200, 2016-05-19)
myfft\db\synth_main.db_info (140, 2016-05-19)
myfft\db\synth_main.hif (174, 2016-05-19)
myfft\db\synth_main.ipinfo (163, 2016-05-19)
myfft\db\synth_main.map.qmsg (4032, 2016-05-19)
myfft\db\synth_main.map.rdb (1166, 2016-05-19)
myfft\db\synth_main.map_bb.hdb (7964, 2016-05-19)
myfft\db\synth_main.pti_db_list.ddb (177, 2016-05-19)
myfft\db\synth_main.sld_design_entry.sci (202, 2016-05-19)
myfft\db\synth_main.smart_action.txt (8, 2016-05-19)
myfft\db\synth_main.tis_db_list.ddb (177, 2016-05-19)
myfft\dff.vhd (627, 2001-03-20)
myfft\divide.vhd (1222, 2001-03-20)
myfft\ioadd.vhd (1012, 2001-03-20)
myfft\iod_staged.vhd (1201, 2001-03-20)
myfft\lblock.vhd (523, 2001-03-20)
myfft\mult.vhd (832, 2001-03-20)
myfft\multiply.vhd (2192, 2001-03-20)
myfft\mux_add.vhd (571, 2001-03-20)
myfft\mux_but.vhd (585, 2001-03-20)
myfft\negate.vhd (823, 2001-03-20)
myfft\normalize.vhd (2139, 2001-03-20)
myfft\out_result.vhd (624, 2001-03-20)
... ...
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