Fifo
所属分类：VHDL/FPGA/Verilog
开发工具：VHDL
文件大小：361KB
下载次数：6
上传日期：2011-03-28 18:43:31
上 传 者：
dzf2222
说明： 在quartus2中实现FIFO并仿真通过
(FIFO is implemented in quartus2 and simulation by)
文件列表:
Fifo\Fifo.qpf (906, 2009-08-24)
Fifo\Fifo.qsf (2154, 2009-08-24)
Fifo\db\wed.wsf (11679, 2009-08-24)
Fifo\db\Fifo.db_info (137, 2009-08-24)
Fifo\db\prev_cmp_Fifo.qmsg (3171, 2009-08-24)
Fifo\db\Fifo.sld_design_entry.sci (154, 2009-08-24)
Fifo\db\Fifo.signalprobe.cdb (350, 2009-08-24)
Fifo\db\Fifo.eco.cdb (161, 2009-08-24)
Fifo\db\Fifo.map.qmsg (1808, 2009-08-24)
Fifo\db\Fifo.cmp0.ddb (71056, 2009-08-24)
Fifo\db\Fifo.cmp.cdb (11137, 2009-08-24)
Fifo\db\Fifo.cmp.hdb (10376, 2009-08-24)
Fifo\db\Fifo.cbx.xml (197, 2009-08-24)
Fifo\db\Fifo.hif (6329, 2009-08-24)
Fifo\db\Fifo.(0).cnf.cdb (3783, 2009-08-24)
Fifo\db\Fifo.(0).cnf.hdb (1215, 2009-08-24)
Fifo\db\altsyncram_idh1.tdf (21406, 2009-08-24)
Fifo\db\Fifo.(1).cnf.cdb (1621, 2009-08-24)
Fifo\db\Fifo.(1).cnf.hdb (718, 2009-08-24)
Fifo\db\Fifo.(2).cnf.cdb (1725, 2009-08-24)
Fifo\db\Fifo.(2).cnf.hdb (744, 2009-08-24)
Fifo\db\Fifo.hier_info (13449, 2009-08-24)
Fifo\db\Fifo.rtlv_sg.cdb (6126, 2009-08-24)
Fifo\db\Fifo.sim.qmsg (3171, 2009-08-24)
Fifo\db\Fifo.rtlv.hdb (12411, 2009-08-24)
Fifo\db\Fifo.rtlv_sg_swap.cdb (1602, 2009-08-24)
Fifo\db\Fifo.pre_map.hdb (12410, 2009-08-24)
Fifo\db\Fifo.pre_map.cdb (4542, 2009-08-24)
Fifo\db\Fifo.psp (3, 2009-08-24)
Fifo\db\Fifo.dbp (0, 2009-08-24)
Fifo\db\Fifo.pss (196, 2009-08-24)
Fifo\db\Fifo.map_bb.logdb (4, 2009-08-24)
Fifo\db\Fifo.sgdiff.cdb (3625, 2009-08-24)
Fifo\db\Fifo.sgdiff.hdb (12507, 2009-08-24)
Fifo\db\Fifo.sld_design_entry_dsc.sci (154, 2009-08-24)
Fifo\db\Fifo.syn_hier_info (0, 2009-08-24)
Fifo\db\Fifo.cmp.rdb (21557, 2009-08-24)
Fifo\db\Fifo.eds_overflow (4, 2009-08-24)
Fifo\db\Fifo.map_bb.cdb (4088, 2009-08-24)
Fifo\db\Fifo.map_bb.hdb (10437, 2009-08-24)
... ...
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