ECG
所属分类：单片机开发
开发工具：Visual C++
文件大小：3737KB
下载次数：8
上传日期：2016-08-29 20:40:49
上 传 者：
fiitl
说明： 基于FRDM-KL25Z及简单运放（LM324）设计出了一套小巧、低成本的心电监测装置。它不但能够结合上位机实时显示心电图而且能够将采集的心电信号储存于SD卡，用于24h心电监护，以备观察不同时间段心血管疾病的症状。
(FRDM-KL25Z and simple operational amplifier (LM324) based on the designed ECG monitoring device with a set of small, low cost. It can not only combine with the real-time display of the host computer and can store the collected ECG signals in SD card for 24h ECG monitoring for the observation of the symptoms of cardiovascular diseases at different time periods.
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文件列表:
ECG检测电路\AD.PcbDoc (350208, 2014-02-20)
ECG检测电路\AD.PcbDoc.htm (5020, 2014-03-23)
ECG检测电路\AD.PcbDocPreview (18509, 2014-03-23)
ECG检测电路\AD.SchDoc (83968, 2013-03-22)
ECG检测电路\AD.SchDocPreview (35868, 2014-03-23)
ECG检测电路\AD_convert.PrjPCB (31176, 2014-02-19)
上位机及源码\MCU及文档说明\build\iar\config files\128KB_Pflash.icf (2168, 2012-12-14)
上位机及源码\MCU及文档说明\build\iar\config files\16KB_RAM.icf (1776, 2012-12-14)
上位机及源码\MCU及文档说明\build\iar\config files\32KB_Pflash.icf (2168, 2012-12-14)
上位机及源码\MCU及文档说明\build\iar\config files\4KB_RAM.icf (1790, 2012-12-14)
上位机及源码\MCU及文档说明\build\iar\config files\64KB_Pflash.icf (2192, 2012-12-14)
上位机及源码\MCU及文档说明\build\iar\config files\8KB_RAM.icf (1778, 2012-12-14)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Exe\ECG.out (269384, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Exe\ECG.sim (16527, 2013-03-21)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\AD_init.o (11492, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\AD_init.pbi (350784, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\AD_init.pbi.cout (12250, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\alloc.o (10452, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\alloc.pbi (352097, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\alloc.pbi.cout (12246, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\arm_cm0.o (15564, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\arm_cm0.pbi (349776, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\arm_cm0.pbi.cout (12245, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\assert.o (7396, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\assert.pbi (348351, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\assert.pbi.cout (12247, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\cmp.o (9488, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\cmp.pbi (349872, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\cmp.pbi.cout (12249, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\crt0.o (1708, 2013-03-21)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\data_deal.o (8120, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\data_deal.pbi (432802, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\data_deal.pbi.cout (12258, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\deviceio.o (17480, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\deviceio.pbi (402655, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\deviceio.pbi.cout (12257, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\ECG.pbd (0, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\ECG.pbd.browse (3641346, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\ECG.pbd.tmp (1638690, 2013-03-22)
上位机及源码\MCU及文档说明\build\iar\ecg_0320\Debug\Obj\gpio.o (14704, 2013-03-22)
... ...
MCG mode error codes
0x01 - Not in FEI mode
0x02 - Not in FEE mode
0x03 - Not in FBI mode
0x04 - Not in FBE mode
0x05 - Not in BLPI mode
0x06 - Not in BLPE mode
0x07 - Not in PBE mode
0x08 - Not in PEE mode
CLock MUX switching error codes
0x11 - IREFST did not clear within allowed time, FLL reference did not switch over from internal to external clock
0x12 - IREFST did not set within allowed time, the FLL reference did not switch over from external to internal clock(NEED TO CHECK IN MOVES TO FBI MODE)
0x13 - IRCST did not clear within allowed time, slow IRC is not selected
0x14 - IREFST did not set within allowed time, fast IRC is not selected
0x15 - PLLST did not clear, PLLST did not switch to FLL output, FLL is not running
0x16 - PLLST did not set, PLLST did not switch to PLL ouptut, PLL is not running
0x17 - PLLCST did not switch to the correct state, the correct PLL is not selected as PLLS clock source
0x18 - CLKST != 0, MCG did not switch to FLL output
0x19 - CLKST != 1, MCG did not switch to internal reference clock source
0x1A - CLKST != 2, MCG did not switch to external clock source
0x1B - CLKST != 3, MCG did not switch to PLL
Oscillator error codes
0x21 - external frequency is greater than the maximum frequency
0x22 - crystal frequency outside allowed range
0x23 - OSCINIT/OSCINIT2 did not set within allowed time
0x24 - RTC frequency outside allowed range
0x25 - RTC oscillator did not initialize in time
IRC and FLL error codes
0x31 - slow IRC is outside allowed range
0x32 - fast IRC is outside allowed range
0x33 - FLL frequency is below minimum value for range 0
0x34 - FLL frequency is above maximum value for range 0
0x35 - FLL frequency is below minimum value for range 1
0x36 - FLL frequency is above maximum value for range 1
0x37 - FLL frequency is below minimum value for range 2
0x38 - FLL frequency is above maximum value for range 2
0x39 - FLL frequency is below minimum value for range 3
0x3A - FLL frequency is above maximum value for range 3
0x3B - FLL DRS range is greater than 1
PLL error codes
0x41 - PRDIV outside allowed range
0x42 - VDIV outside allowed range
0x43 - PLL reference clock frequency is outside allowed range
0x44 - LOCK or LOCK2 bit did not set
0x45 - PLL output frequency is outside allowed range (NEED TO ADD THIS CHECK TO fbe_pbe and blpe_pbe) only in fei-pee at this time
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