spart6_ddr2_example_source
所属分类：VHDL/FPGA/Verilog
开发工具：Others
文件大小：3894KB
下载次数：72
上传日期：2011-03-31 15:51:39
上 传 者：
chifeng321
说明： 这是目前比较新的平台spart6上的MCB的实例，spart6内置一个DDR2的控制器，对于需要用到新平台的朋友，有一定的帮助。
(This is a relatively new platform spart6 instance on the MCB, spart6 built a DDR2 controller, need to use a new platform for friends, have some help.)
文件列表:
spart6_ddr2\all_watch_bus1.11.cpj (185057, 2010-01-13)
spart6_ddr2\all_watch_signal.cpj (219503, 2010-01-11)
spart6_ddr2\DDR2_TEST_summary.html (3324, 2010-01-10)
spart6_ddr2\device_usage_statistics.html (297080, 2010-03-17)
spart6_ddr2\example_top_summary.html (3326, 2010-01-13)
spart6_ddr2\iodrp_controller.v (8730, 2009-06-16)
spart6_ddr2\ipcore_dir\ddr2_find_error.asy (194, 2010-01-10)
spart6_ddr2\ipcore_dir\ddr2_find_error.gise (1264, 2010-03-17)
spart6_ddr2\ipcore_dir\ddr2_find_error.ise (10714, 2010-03-17)
spart6_ddr2\ipcore_dir\ddr2_find_error.ncf (0, 2010-02-03)
spart6_ddr2\ipcore_dir\ddr2_find_error.ngc (29901, 2010-01-10)
spart6_ddr2\ipcore_dir\ddr2_find_error.v (39741, 2010-01-10)
spart6_ddr2\ipcore_dir\ddr2_find_error.veo (1090, 2010-01-10)
spart6_ddr2\ipcore_dir\ddr2_find_error.vhd (44268, 2010-01-10)
spart6_ddr2\ipcore_dir\ddr2_find_error.vho (1469, 2010-01-10)
spart6_ddr2\ipcore_dir\ddr2_find_error.xco (1339, 2010-01-10)
spart6_ddr2\ipcore_dir\ddr2_find_error.xise (3042, 2010-01-10)
spart6_ddr2\ipcore_dir\ddr2_find_error_flist.txt (372, 2010-01-10)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila.asy (893, 2010-02-03)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila.cdc (27895, 2010-02-03)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila.gise (1276, 2010-03-17)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila.ise (10716, 2010-03-17)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila.ncf (0, 2010-02-03)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila.ngc (1087549, 2010-02-03)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila.v (2087331, 2010-02-03)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila.veo (1378, 2010-02-03)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila.vhd (2292123, 2010-02-03)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila.vho (2001, 2010-02-03)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila.xco (3759, 2010-02-03)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila.xise (3066, 2010-02-03)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila_flist.txt (457, 2010-02-03)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila_xdb\tmp\ise\version (138, 2010-03-17)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila_xdb\tmp\ise\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject (41, 2010-02-10)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila_xdb\tmp\ise\__OBJSTORE__\HierarchicalDesign\HDProject\HDProject_StrTbl (32, 2010-02-10)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila_xdb\tmp\ise\__OBJSTORE__\PnAutoRun\Scripts\RunOnce_tcl (27, 2010-03-17)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila_xdb\tmp\ise\__OBJSTORE__\PnAutoRun\Scripts\RunOnce_tcl_StrTbl (3817, 2010-03-17)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila_xdb\tmp\ise\__OBJSTORE__\ProjectNavigator\dpm_project_main\dpm_project_main (25, 2010-03-17)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila_xdb\tmp\ise\__OBJSTORE__\ProjectNavigator\dpm_project_main\dpm_project_main_StrTbl (10, 2010-03-17)
spart6_ddr2\ipcore_dir\ddr2_find_error_ila_xdb\tmp\ise\__REGISTRY__\Autonym\regkeys (0, 2010-01-11)
... ...
The following files were generated for 'ddr2_find_error' in directory
C:\V3_DDR2_MT46H***M16\V3_DDR2_MT46H***M16\ipcore_dir\
ddr2_find_error_flist.txt:
Text file listing all of the output files produced when a customized
core was generated in the CORE Generator.
ddr2_find_error.asy:
Graphical symbol information file. Used by the ISE tools and some
third party tools to create a symbol representing the core.
ddr2_find_error.gise:
ISE Project Navigator support file. This is a generated file and should
not be edited directly.
ddr2_find_error.ise:
ISE Project Navigator support file. This is a generated file and should
not be edited directly.
ddr2_find_error.ngc:
Binary Xilinx implementation netlist file containing the information
required to implement the module in a Xilinx (R) FPGA.
ddr2_find_error.v:
Verilog wrapper file provided to support functional simulation.
This file contains simulation model customization data that is
passed to a parameterized simulation model for the core.
ddr2_find_error.veo:
VEO template file containing code that can be used as a model for
instantiating a CORE Generator module in a Verilog design.
ddr2_find_error.vhd:
VHDL wrapper file provided to support functional simulation. This
file contains simulation model customization data that is passed to
a parameterized simulation model for the core.
ddr2_find_error.vho:
VHO template file containing code that can be used as a model for
instantiating a CORE Generator module in a VHDL design.
ddr2_find_error.xco:
CORE Generator input file containing the parameters used to
regenerate a core.
ddr2_find_error.xise:
ISE Project Navigator support file. This is a generated file and should
not be edited directly.
ddr2_find_error_readme.txt:
Text file indicating the files generated and how they are used.
ddr2_find_error_xmdf.tcl:
ISE Project Navigator interface file. ISE uses this file to determine
how the files output by CORE Generator for the core can be integrated
into your ISE project.
Please see the Xilinx CORE Generator online help for further details on
generated files and how to use them.
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